Synopsys’ Digital to Analog Conversion

Last Thursday, the same day that Synopsys announced it’s acquisition of MIPS’ Analog Business Group (ABG) for $22M in cash, I had a long overdue lunch with a former colleague of mine at Synopsys. We spent most of the time talking about family, and how each other’s jobs were going, and the economy, and the industry in general.

At some point, the discussion got around to Aart DeGeus and his leadership qualities. My friend, who plays bass guitar with Aart on occasion, shared with me his observations of Synopsys’ CEO outside of work. “He’s a born leader, even when he’s playing music,” my friend said as he related one story of how Aart lead the band in an improvisational session with the same infectious enthusiasm he brings to Synopsys. Here’s a look.

While driving back from lunch, I recalled a field conference from the mid 1990s where Aart introduced the notion of “Synopsys 2”. Synopsys 2 was to be a new company (figuratively, not literally) that would obsolete Synopsys 1 and take a new leadership role in a transforming industry. At that time, Synopsys 1 was the original “synthesis company” along with some test and simulation tools. The industry challenge driving Synopsys 2 was the need for increased designer productivity to keep up with chip sizes increasing due to the inexorable and ubiquitous Moore’s Law.

Aart’s vision for this new EDA order was twofold. First, behavioral synthesis would allow designers to design at a higher, more efficient, and more productive level of abstraction, thereby increasing their productivity. In fact, your’s truly helped develop and deliver the very first DAC floor demo of Behavioral Compiler. I also developed a very simple but elegant presentation of the power of behavioral synthesis that was used throughout Synopsys, garnered the praise of Aart himself, and sits in my desk as a memento of my time at Synopsys. Unfortunately, behavioral synthesis never really caught on at the time. Oh well. So much for that.

The second part of Aart’s productivity vision was design reuse. Needless to say, that vision has come true in spades. I don’t have reliable numbers at my finger tips, but I would guess that there is hardly a chip designed without some sort of implementation or verification IP reuse. Some chips are almost entirely reusable IP, with the only custom logic stitching it all together. I can’t imagine designing 100M gate chips without design reuse.

Design teams looking for digital IP were faced with a straightforward make vs. buy decision. On the one hand, most design teams could design the IP themselves given enough time and money. They could even prototype and verify the IP via FPGA protoytype to make sure it would work. But could they do it faster and cheaper than buying the IP and could they do it with a higher level of quality? The design team that decided they could do a better, faster, cheaper job themselves, did so. The others bought the IP.

But analog and mixed signal IP is very different. Whereas most design teams have the skills and ability to design digital IP, they usually do not have the expertise to design complex analog and mixed signal IP. Not only are analog designers more scarce, but the problem keeps getting harder at smaller geometries. Ask any analog designer you know how hard it is to design a PLL at 65 nm or 45 nm. What were 4 corner simulations at 90nm become 16 corner or even monte-carlo simulations at 45 nm and below. Not only is analog design difficult, but it often requires access to foundry specific information only available to close partners of the foundries. And even if you can get the info and design the IP, there is no quick FPGA prototype to prove it out. You need to fab a test chip (which is several months), complete with digital noise sources to stress the IP in its eventual environs. The test chip can cost several million dollars (much more than an FPGA protoype for digital IP) and you’d better count on at least one respin to get it right.

That is why Synopsys’ acquisition of the MIPS ABG IP is such a good move. The “value proposition” for analog IP is so much greater than for digital IP. It’s not a matter of whether the customer can design the IP faster, better, cheaper, it’s whether he can design it at all. By expanding its analog IP portfolio, at a bargain price, Synopsys is well positioned to provide much of the analog and mixed signal IP at 65 nm and below. In addition, this acquisition gives Synopsys a real analog design team with which they can perform design services, something they have coveted but lacked for some time.

Once again, it looks like Aart is taking the leadership role. Look for other companies to follow the leader.

harry the ASIC guy

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3 Responses to “Synopsys’ Digital to Analog Conversion”

  1. Mike Demler says:


    SNPS already had analog design teams in Oregon from the Accelerant acquisitions. ChipIdea is based in Portugal, so I don’t think that services is in the plan. Do you really think SNPS coveted that? Wasn’t a money maker for CDNS, and puts an EDA company more in competition with their customers.

    I think that the biggest element in the acquisition was ability to add HDMI to the interface catalog.

  2. harry says:

    Hi Mike,

    Thanks for your comment. I value your opinion. However, I think I will disagree, but leave the door open to be proven wrong.

    As a former Program Manager in the Synopsys Professional Services organization, I can attest to the fact that the analog designers within the IP design group (Accelerant included) were hardly “available” to perform services. There were at least 2 consulting opportunities where a customer wanted a customized and tweaked IP where we had to “no bid” because the IP group was working on a higher leverage product. I need to add that I completely understand those decisions from a business perspective since the IP designers’ time was better spent designing IP that could be sold and resold vs. sold once. The other issue of supporting a custom IP was also a roadblock.

    Synopsys services has toyed with doing AMS design services in the past, but never had the right tools or people in house. With Custom Designer I think they have a workable tool and they now have the designers. Whether those designers will be dedicated to new product development or available for services, I do not know. But at least that door is open.

    As for CDNS, I think their services AMS design group is currently doing quite well. They have some good people … but I also know some better people.



  3. EDAgeek says:

    Aside of all the benefits stated, the ABG acquisition is very strategic. Cadence is the market leader is AMS flow. Synopsys has come up with an excellent AMS flow but it will still be hard to compete the hundreds of engineering years of maturity of Virtuoso across the variety of uses with many-many AMS circuits.

    The acquisition of ABG enhanced Synopsys with a diverse porfolio of AMS IP which will enable to (a) accelerate the maturity of the AMS flow offering, (b) provide complete solutions consisting of AMS flow + IP and (c) accelearte the experience curve on AMS design to make the solution more scalable overtime. Can’t do that without owning AMS Flow + IP.

    Next on Synopsys’ shopping cart should be memory IP and longer term processor IP.

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