harry … the ASIC guy

Although I had heard his name mentioned quite often, it wasn’t until this year at DAC that I finally met Scott Clark  for the first time. Scott was describing how, as Director of Engineering Infrastructure at Broadcom, he led a project to virtualize Broadcom’s internal data center in order to transform it into a private cloud. It was a great discussion. We had lunch a few weeks later to talk about his new business, Deopli, a company that he has founded to help other semiconductor and EDA companies improve their compute infrastructure operations in similar fashion.

So, when I saw Dan Nenni’s blog post on cloud computing and some of the responses, I thought I’d contact Scott. You see, as opposed to most of those commenting on Dan’s post, Scott has actually taken EDA tools and moved them to the cloud, so he knows what he’s talking about. Scott was kind enough to contribute a blog post on the subject, so please enjoy.

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Harry the ASIC Guy pointed me to Dan Nenni’s Silicon Valley Blog to take a look at this post regarding Daniel Suarez’s books Daemon and Freedom. His post intrigued me enough to download the first book to my iPad to get a feel for the style and atmosphere. That was good enough that I plan to read both. You can read Dan’s post to see his overview of the books, but at the end of his post, he poses a question that seemed to spark lots of conversation and varying opinions. His question was “Who can be trusted to secure Darknet (Cloud Computing)?”

I think Dan was making reference to concepts in the book where all data in the world becomes controlled by a finite set of service providers, and therefore creates an exposure based on the singularity of the solution. His references hit pretty close to home in Apple, Microsoft and Google, but that did not seem to be the focus of the responses. Because Dan’s background (and blog) is primarily in the EDA / Semiconductor space, the responses seemed to fall into the category of “Should Semiconductor companies use Cloud Computing?” and the array of opinions seemed to align on the two ends of the spectrum. There were a few respondents who felt that EDA would never ever move into the Cloud or gave somewhat skewed definitions of “cloud” to say “it’s impossible” but for the most part, it was refreshing to see some open minded views of what was possible and how things could work. I was particularly intrigued by Dan’s comment that he felt foundries would venture into the cloud hosting space. Given the history of the fabless semiconductor space, how can that not make perfect sense! The leadup to the creation of foundries was that internal manufacturing was growing in capacity and complexity to the point that it made more sense to have that done externally. The same dynamics are happening in the datacenter space for chip design today.

Some of the comments were very accurate in my experiences, so just to highlight a few (please read the blog for specifics so I don’t mis-quote). Daniel Payne made the observation that semiconductor companies will start by creating their own private cloud, and that is exactly where we are today (compute clusters really are private clouds). James Colgan injected sanity throughout and made some very astute observations about the functional dynamics and applicability of cloud to certain parts of a design flow. I can’t say how much I agree with Kevin Cameron’s comments on security; cloud has the potential to be a huge boost in security for the industry. Tom Anderson indicated that he is already doing chip design using Amazon EC2 resources, and I think there are many more like Tom out there. One of the last postings to date is by Lou Covey, and his opinion is that Cloud for the industry is inevitable - I happen to agree with that. It’s not that we “have to” but more of “this is the right answer for the business, and we should do the right thing”.

One of the missing concepts that I notice is that this blog is looking at generic cloud solutions, and not industry specific solution. You will see the development of EDA specific cloud solutions that is very focused on EDA customers, and in the beginning it will be private clouds with technology added to elastic expansion. That said, looking at Cloud for the EDA industry, there are still going to be several roadblocks to adoption that will need to be addressed:

• Ego – getting around the perception that IT is a core competency of chip design companies. The core competency of a chip design company should be … chip design.
• Cost – getting around the expectation that cloud should cost ½ as much as what I am currently paying. There are many economies of scale and efficiencies that cloud brings. Cloud is an opportunity for cost avoidance as time goes forward, not a refund policy.
• Trust – letting go of what is a critical function / resource and having confidence that you can still get the results necessary. This industry has a very powerful model to refer to. In this case, how the fabs were released, and successful partnerships were formed.
• Control – how to let go of a critical resource, and still maintain control over the resources, costs, schedules, and dynamics of capacity / priority decisions.
• Security – probably the most wielded blade in the “you can’t do it” arsenal, but also probably the most misunderstood.
• Performance – the final roadblock, which is the one with the most technical merit, is performance. There are many different facets to performance, but it will primarily fall into “internal cluster performance” and “display performance”.

My perspective, the ego part we can get around. Current conversations with many EDA companies indicate they are already leaning this direction, which is a good sign.

The cost issue is far more ambiguous. There are as many expectations of cloud as there are definitions, but invariably the expectations are rooted in economics. Given that, the only answer seems to be to create a realistic model for cost, present the data, and let nature take it’s course. There really is cost benefit, so companies will want to accomplish that

Trust seems like it should be the easy part for this industry, but it is proving to be more stubborn than that. I think that is mostly because of the implied threat to job security for the people who are currently performing the tasks (who are usually the people receiving the presentation about outsourcing their job). EDA companies should examine their own history to see what to do and how to do it.

The control front falls into the same category as trust. The same way that fabless semiconductor companies created internal organizations and positions for managing the outsource of the foundries, that model should be applied to the outsourcing of computational infrastructure. That is not to say there will not be contention issues for capacity and priority. The cloud suppliers will need to make sure they have enough resources so they can provide sufficient capacity to the customers, or they will not be the supplier long. Again, foundries will be a great model to look at for this.

On the security front, Cloud will at a minimum give data points to show how weak internal security has been historically. Applying best security practices in a consistent manner should actually help evolve an industry specific cloud security solution to better address security issues. And for the time being, we can just avoid the multi-tenant aspects of security by maintaining isolation – private clouds with share dynamic resources.

And finally, given that we are stalking about EDA specific clouds, they will be specifically designed to have “internal cluster performance” appropriate for EDA. It will be designed exactly like we would design that cluster for a companies private datacenter. The tricky part will be in addressing display performance issues for functions like custom layout and board design where network latency causes the engineer’s working style to be impacted.

So really this boils down to proper execution by the EDA cloud providers, and one technical hurdle of display latency, which has many ways to be addressed. There is a lot of money and attention being aimed at these issues and this industry, and really no real reason why it will not succeed. There might be some companies that choose to adopt at a slower rate than others, but I believe this will become the direction everyone goes eventually. Thanks Dan for a great read and thanks Harry for pointing me at it.

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Scott Clark has been an infrastructure solution provider in the EDA/Semiconductor industry for the last 20 years, working for companies like Western Digital, Conexant, and Broadcom. He holds a bachelors of science in applied mathematics from San Diego State University and is currently President and CEO of Deopli Corporation. You can follow Scott on his blog at HPC in the Clouds.

 (Part 3 in the series Which Direction For EDA: 2D,3D, or 360?)

In the last blog post, I started to examine the question “is 2D scaling really dead or just mostly dead?” I looked at the most challenging issue for 2D scaling, lithography. But even if we can draw the device patterns somehow on the wafer at smaller and smaller geometries, does not necessarily mean that the circuits will deliver the performance (speed, area, power) improvements that Moore’s Law has delivered in the past. Indeed, as transistors get smaller (gate length and width) they also get shorter (oxide thickness). There are limits to the improvements we can gain in power and speed. We’ll talk about those next.

Transistor Design

First, consider what has made 2D scaling effective to date. The move to smaller geometries has allowed us to produce transistors that have shorter channels, operate at lower supply voltages, and switch less current. The shorter channel results in lower gate capacitance and higher drive which means faster devices. And the lower supply voltage and lower current result in lower dynamic power. All good.

At the same time, these shorter channels have higher sub-threshold and source-drain leakage currents and the thinner gate oxide results in greater gate leakage. At the start of Moore’s Law, leakage was small, so exponential increases were not a big deal. But at current and future geometries, leakage power is on par and soon exceeding dynamic power. And we care more today about static power, due to the proliferation of portable devices that spend most of their time in standby mode.

The reduction in dynamic power is also reaching a limit. Most of the dynamic power reduction of the last decade was due to voltage scaling. For instance, scaling from 3.3V to 1.0V reduces power by 10x alone. But reductions beyond 08.V are problematic due to the inherent drop across a transistor and device threshold voltages. Noise margins are fast eroding and that will cause new problems.

Still, as with lithography, we haven’t thrown in the towel yet.

Strained Silicon is a technique that has been in use since the 90nm and 65nm nodes. It involves stretching apart the silicon atoms to allow better electron mobility and hence faster devices at lower power consumpti0on, up to 35% faster.

Hi-k dielectrics (k being the dielectric constant of the gate oxide) can reduce leakage current. The silicon dioxide is replaced with a material such as hafnium dioxide with a larger dielectric constant, thereby reducing leakage for an equivalent capacitance. This technique is often implemented with another modification which is replacing the polysilicon gate with a metal gate with lower resistance, hence increasing speed. Together, the use of hi-k dielectrics with metal gates is often referred to by the acronym HKMG and is common at 45nm and beyond.

A set of techniques commonly referred to as FinFET or Multi-gate FET (MuGFET) break the gate of a single transistor into several gates in a single device. How? Basically by flipping the transistor on it’s side. The net effect is a reduction in effective channel width and device threshold with the same leakage current; i.e. faster devices with lower dynamic power with the same leakage power.  But this technique is not a simple “tweak”; it’s a fundamental change in the way we build devices. To quote Bernard Meyerson of IBM, “to go away from a planar device and deal with a non-planar one introduces unimaginable complexities.” Don’t expect this to be easy or cheap.

A more mainstream technology that has been around a while, Silicon-on-Insulator (SOI), is also an attractive option for very high performance ICs such as those found in game consoles. In SOI ICs, a thick layer of an insulator (usually silicon dioxide) lies below the devices instead of silicon as in normal bulk CMOS. This reduces device capacitance and results in a speed-power improvement of 2x-4x, although with more expensive processing and a slightly more complex design process. You can find a ton of good information at the SOI Consortium website.

In summary, we are running into a brick wall for transistor design. Although there are new design techniques that can get us over the wall, none of these are easy and all of them are expensive, And the new materials used in this process create new kinds of defects, hence reducing yield. With some work, the techniques above may get us to 16nm or maybe a little bit further. Beyond that, they’re talking about Graphene transistors (i.e. carbon nanotubes), pretty far out stuff.

In my next post, I’ll look at some of the other considerations regarding 2D scaling, not the least of which is the extraordinary cost.

harry the ASIC guy

(Photo courtesy Ron Ploof) 

I had the pleasure yesterday of interviewing Brian Bailey in the Synopsys Conversation Central Stage at DAC. We discussed his roots in verification working with the initial developers of digital simulation tools and his blogging experiences these past few years. There are, of course, even a few comments on the difference between journalists and bloggers

You can listen to this half hour interview at the Synopsys Blog Talk Radio site. I’d be interested in your comments on the show and the format as well. It was pretty fun, especially in front of a live audience.

At 12:30 PDT today, I’ll be doing another interview on Security Standards for the Cloud. You can tune in live on your computer or mobile device by going to the main Synopsys Blog Talk Radio Page. So, even if you’re not here at DAC, you can still partake.

harry the ASIC guy

Last year’s Design Automation Conference was kind of quiet and dull, muted by the impact of the global recession with low attendance and just not a lot of real interesting new developments. This year looks very different; I’m actually having to make some tough choices of what sessions to attend. And with all the recent acquisitions by Cadence and Synopsys, the landscape is changing all around, which will make for some interesting discussion.

I’ll be at the conference Monday through Wednesday. As a rule, I try to keep half of my schedule open for meeting up with friends and colleagues and for the unexpected. So if you want to chat, hopefully we can find some time. Here are the public events that I have lined up:

Monday

10:30 - 11:00 My good friend Ron Ploof will interviewing Peggy Aycinena on the Synopsys Conversation Central stage, so I can’t miss that. They both ask tough questions so that one may get chippy. (Or you can participate remotely live here)

11:30 - 12:00 I’ll be on that same Synopsys Conversation Central stage interviewing Verification Consultant and Blogger Extraordinaire Brian Bailey. Audience questions are encouraged, so please come and participate. (Or you can participate remotely live here)

3:00 - 4:00 I’ll be at the Atrenta 3D Blogfest at their booth. It should be an interesting interactive discussion and a good chance to learn about one of the 3 directions EDA is moving in.

6:00 - Cadence is having a Beer for Bloggers event but I’m not sure where. For the record, beer does not necessarily mean I’ll write good things. (This event was canceled since there is the Denali party that night).

Tuesday

8:30 - 10:15 For the 2nd straight year, a large fab, Global Foundries (last year it was TSMC) will be presenting their ideas on how the semiconductor design ecosystem should change From Contract to Collaboration: Delivering a New Approach to Foundry

10:30 - 12:00 I’ll be at a panel discussion on EDA Challenges and Options: Investing for the Future. Wally Rhines is the lead panelist so it should be interesting as well.

12:30 - 1:00 I’ll be back at the Synopsys Conversation Central stage interviewing James Wendorf (IEEE) and Jeff Green (McAfee) about standards for cloud computing security, one of the hot topics.

Wednesday

10:30 - 11:30 I’ll be at the Starbucks outside the convention floor with Xuropa and Sigasi. We’ll be giving out Belgian Chocolate and invitations to use the Sigasi-Xilinx lab on Xuropa.

2:00 - 4:00 James Colgan, CEO of Xuropa, and representatives from Amazon, Synopsys, Cadence, Berkeley and Altera will be on a panel discussion on Does IC Design have a Future In the Cloud?. You know what I think!

This is my plan. Things might change. I hope I run into some of you there.

harry the ASIC guy

About a week ago, I got an email from someone I know doing a story on how the Design Automation Conference has changed with respect to bloggers since the first EDA Bloggers Birds-of-a-Feather Session 2 years ago. I gave a thoughtful response and some of it ended up in the story, but I thought it would be nice to share my original full response with you.

Has your perception of the differences between bloggers and press changed since the first BOF?

Forget my perception; many of the press are now bloggers! I don’t mean that in a mean way and I understand that people losing their jobs is never a good thing. But I think the lines have blurred because we all find ourselves in similar positions now. It’s not just in EDA … many, if not most, journalists also have a blog that they write on the side.

Ultimately, I think either the traditional “press” or a blog is just a channel between someone with knowledge to people who want information they can trust. What determines trust is the reliability of the source. In thepast, the trust was endowed by the reputation of the publication. Now, weall have to earn that trust.

As for traditional investigative journalism (ala All the President’s Men) and reporting the facts (5 Ws), I think there is still a role for that, butmost readers are looking for insight, not jut the facts.

What do you think of DAC’s latest attempts to address these differences, e.g. Blog-sphere on the show floor, press room in the usual location?

Frankly, I’m not sure exactly what DAC is doing along these lines this year. Last year bloggers had very similar access as journalists to the press room and other facilities. It was nice to be able to find a quiet place to sit, but since most bloggers are not under deadline to file stories it is not as critical. Wireless technology is making a lot of this obsolete since we can pretty much work from anywhere. Still, having the snacks is nice

What does the future hold for blogging at DAC?

Two years ago, blogging was the “new thing” at DAC. Last year, blogging was mainstream and Twitter was the new thing. This year blogging will probably be old skool and there will be another “new thing”. For instance, I think we’re all aware and even involved in Synopsys’ radio show. This stuff moves so fast. So, I think the future at DAC is not so much for blogging, as it is for multiple channels of all kinds, controlled not only by “the media”, but also the vendors, independents, etc. Someone attending DAC will be able to use his wireless device to tap into many channels, some in real-time.

Next year, I predict that personalized and location aware services will be a bigger deal. When you come near a booth, you may get an invitation for a free demo or latte if your profile indicates you are a prospective customer. You’ll be able to hold up your device and see a “google goggles” like view of the show floor. You may even be able to tell who among your contacts is at the show and where they are. Who knows? It will be interesting.

harry the ASIC guy

As I’ve mentioned before, I live in California, the state with the 46th best elementary school system in the country. Thank you California Lottery! So keep that in mind as you read the rest of this post.

One of the more challenging homework assignments my 3rd grade daughter receives regularly is to write a short story using a list of the week’s dozen or so spelling words. For instance, this is one that she received not so long ago:

Write about a time when you worked very hard to learn something. Tell what the experience was like. Use spelling words from the list.

And the list was:

coach    blow    float    hold    sew    though

sold    soap    row    own    both    most

She wrote about the time she learned to play the piano at summer camp. I won’t embarrass her by posting the story here, but suffice it to say that it was pretty forced. Don’t even think about asking how she got the word “soap” into the story!

So, this evening, whilst walking the dog, I was listening to this week’s episode of Leo Laporte’s This Week in Tech podcast (aka TWiT). On the podcast, someone mentioned a site called Wordstream. On this site, you can enter a keyword and it will tell you the most common search terms that includes that keyword. The idea is that, if you want to increase your SEO (search engine optimization), you should use the words that are most common in searches and the search engines will send people to you.

I immediately thought of my daughter’s homework assignment. The users of this site must feel like her, trying to weave the words generated by this site into their prose. I wondered how odd that would be. So, I decided to try it, just so I could get a taste of what my daughter went through. And also, because I thought it would be kinda fun.

Being “the ASIC guy”, what word other than “ASIC” could I have entered. After entering my keyword and my email address, I received an email with the 10,000 most common search terms that include “ASIC”. I decided to focus on the top 50 search terms, separating them out into individual words and listed them on a sheet of paper.

Now, without further ado, is Harry’s SEO Homework:

 __________

The alarm rang.

I lurched up out of bed, already in a panic, staring at the clock to see what time it was.

11:00am. Damn!

I took care of the basic biological necessities, then threw on my jeans, a T-shirt, and my brand new ASIC Gel-Kayano running chaussures. At least the company I worked for didn’t have a dress code and they didn’t care what shoes I wore. Designing ASICs and FPGAs is much easier when I’m comfortable.

I had been assigned to the verification team. My job was to search for bugs and to wrestle them down. Thankfully, I was able to use Verilog and System-Verilog for this project. Not like those VLSI design days, when I, and so many of my fellow engineers, had to wear a tie to impress the boss and had to use VHDL because they made us . A language by any other name is better than VHDL. Sure, VHDL is more structured. But, Verilog is a whole lot easier to use.

I’d been searching in some DCT4 code for one particular bug that had eluded me for 15 days. It should have been implemented in analog, but some Einstein decided digital logic was easier to design, so here I was.  It was me vs the bug. And the bug was winning!

Then it hit me. I was looking at the wrong register!

I felt a surge of power as I unlocked and modified my testbench. The combination of sleeplessness and Mountain Dew made me delirious. For a moment, I thought I was wearing a women’s dress and Onitsuka ASICs while playing volleyball in a prison cell. Gotta stop hanging out with those guys from the UK who watch Monty Python all the time.

I acted quickly, changing an “lt” to a “gt“, invoking the recompile flow on the new code, and kicking off the regression sim.

The simulation worked and I breathed a sigh of relief. My boss had threatened to bring in some hotshot design services company that he’d found on a website if I couldn’t find this bug. The nimbus that had been floating over my head for weeks was gone.

Now I could keep my job.

And now it was time for the layout guys to sweat!

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Phew! That was a lot harder than I thought. (Especially since those ASICS running shoes get a lot more hits apparently than the ASICs I usually write about). But now that I wrote and published that story, I expect I’ll be #1 on Google Search in the morning:-)

To be fair, I think there is certainly some value in understanding how people find this blog through various search terms. It helps me to understand what kind of information they are looking for and that helps me choose better topics to write about. But, taken to the extreme, if I write content for the search engines instead of all of you (my readers), then I’m in trouble. You may find me, but you won’t like what you find. And that would be much worse.

If anyone else wants to give this a try just for grins, just go to Wordstream and try it out. Just let me know where to find your “masterpiece”.

harry the ASIC guy

http://www.flickr.com/photos/optical_illusion/ / CC BY 2.0

What’s a blog without some sort of obligatory year end TOP 10 list?

So, without further ado, here is my list of the TOP 10 events, happenings, occurrences, observations that I will remember from 2009. This is my list, from my perspective, of what I will remember. Here goes:

1. Verification Survey - Last February, as DVCon was approaching, I thought it would be interesting to post a quickie survey to see what verification languages and methodologies were being used. Naively, I did not realize to what extent the fans of the various camps would go to rig the results in their favor. Nonetheless, the results ended up very interesting and I learned a valuable lesson on how NOT to do a survery.
2. DVCon SaaS and Cloud Computing EDA Roundtable - One of the highlights of the year was definitely the impromptu panel that I assembled during DVCon to discuss Software-as-a-Service and Cloud Computing for EDA tools. My thanks to the panel guests, James Colgan (CEO @ Xuropa), Jean Brouwers (Consultant to Xuropa),  Susan Peterson (Verification IP Marketing Manager @ Cadence), Jeremy Ralph (CEO @ PDTi), Bill Alexander (VP Marketing @ Blue Pearl Software), Bill Guthrie (VP Marketing @ Numetrics). Unfortunately, the audio recording of the event was not of high enough quality to post, but you can read about it from others at the following locations:
   

   > 3 separate blog posts from Joe Hupcey (1, 2, 3)

   > A nice mention from Peggy Aycinena

   > Numerous other articles and blog posts throughout the year that were set in motion, to some extent, by this roundtable

3. Predictions to the contrary, Magma is NOT dead. Cadence was NOT sold. Oh, and EDA is NOT dead either.
4. John Cooley IS Dead - OK, he’s NOT really dead. But this year was certainly a turning point for his influence in the EDA space. It started off with John’s desperate attempt at a Conversation Central session at DAC to tell bloggers that their blog sucks and convince them to just send him their thoughts. For those who took John up on his offer by sending their thoughts, they would have waited 4 months to see them finally posted by John in his December DAC Trip report. I had a good discussion on this topic with John earlier this year, which he asked me to keep “off the record”. Let’s just say, he just doesn’t get it and doesn’t want to get it.
5. The Rise of the EDA Bloggers.
6. FPGA Taking Center Stage - It started back in March when Gartner issued a report stated that there were 30 FPGA design starts for every ASIC start. That number seemed very high to me and to others, but that did not stop this 30:1 ratio from being quoted as fact in all sorts of FPGA marketing materials throughout the year. On the technical side, it was a year where the issues of verification of large FPGAs came front-and-center and where a lot of ASIC people started transitioning to FPGA.
7. Engineers Looking For Work - This was one of the more unfortunate trends that I will remember from 2009 and hopefully 2010 will be better. Personally, I had difficulty finding work between projects. DAC this year seemed to be as much about finding work as finding tools. A good friend of mine spent about 4 months looking for work until he finally accepted a job at 30% less pay and with a 1.5 hour commute because he “has to pay the bills”. A lot of my former EDA sales and AE colleagues have been laid off. Some have been looking for the right position for over a year. Let’s hope 2010 is a better year.
8. SaaS and Cloud Computing for EDA - A former colleague of mine, now a VP of Sales at one of the small but growing EDA companies, came up to me in the bar during DAC one evening and stammered some thoughts regarding my predictions of SaaS and Cloud Computing for EDA. “It will never happen”. He may be right and I may be a bit biased, but this year I think we started to see some of the beginnings of these technologies moving into EDA. On a personal note, I’m involved in one of those efforts at Xuropa. Look for more developments in 2010.
9. Talk of New EDA Business Models - For years, EDA has bemoaned the fact that the EDA industry captures so little of the value ($5B) of the much larger semiconductor industry ($250B) that it enables. At the DAC Keynote, Fu-Chieh Hsu of TSMC tried to convince everyone that the solution for EDA is to become part of some large TSMC ecosystem in which TSMC would reward the EDA industry like some sort of charitable tax deduction. Others talked about EDA companies having more skin in the game with their customers and being compensated based on their ultimate product success. And of course there is the SaaS business model I’ve been talking about. We’ll see if 2010 brings any of these to fruition.
10. The People I Got to Meet and the People Who Wanted to Meet Me- One of the great things about having a blog is that I got to meet so many interesting people that I would never have had an opportunity to even talk to. I’ve had the opportunity to talk with executives at Synopsys, Cadence, Mentor, Springsoft, GateRocket, Oasys, Numetrics, and a dozen other EDA companies. I’ve even had the chance to interview some of them. And all the fellow bloggers I’ve met and now realize how much they know. On the flip side, I’ve been approached by PR people, both independent and in-house. I was interviewed 3 separate times, once by email by Rick Jamison, once by Skype by Liz Massingill, and once live by Dee McCrorey. EETimes added my blog as a Trusted Source. For those who say that social media brings people together, I can certainly vouch for that.

harry the ASIC guy

My former-EDA-salesperson friend had just finished his lunch when he leaned back in his chair and said:

“Listen. You’ve been on both sides, in EDA and a customer. Lemme ask you a question. Do you think sales people are really needed?”

At first, I was really shocked to hear this question, especially from someone who had been in EDA sales for the last 10 years. After all, you don’t hear plumbers asking if plumbers are needed. Or doctors. Or auto mechanics. Even folks in professions that are experiencing job losses, such as journalism, hardly ever question the value they bring.

I let the question sink in for a few seconds, which seemed like minutes, and answered the only way I could. With another question, “how do you mean?”

As it turns out, my friend was not really having a deep identity crisis. He was just trying to understand why EDA companies, including his former employer, seem to view direct sales people, especially him, as expendable costs, easily replaced with inside sales, marketing campaigns, and online sales methods.

Put that way, it’s an interesting question to consider. Although I have never been a “bag carrying” sales person, I did spend the better party of 14 years on the EDA side in some sort of sales support or semi-sales role. And I still have many friends in sales or applications engineering roles. Were my friends and my old jobs becoming obsolete? Are new technologies, ones that connect customers with companies directly (blogs, forums, etc.), making sales people unnecessary?

On the other hand, I’ve spent the last 3 years of my career back on the other side of the fence, in the customer world. I’ve had the opportunity for many interactions with folks whose shoes I used to wear. Certainly, some of these folks do provide value, marshaling corporate resources to address a tool issue or providing methodology assistance for a new technology. There are also the dirty parts of the job. Without sales people’s efforts, many opportunities would die an early death in the hands of lawyers, accountants, and purchasing reps, or at least they would not occur as quickly as they do.

At the same time, we cannot deny that technology is replacing the need for sales people in many of our other daily purchases, especially consumer electronics. We do all of our research online. We compare product specs on web sites. We seek out product reviews by trusted tech gadget bloggers and ratings by actual customers. We compare prices online and make our purchases with a click. No sales person in the loop.

You’d be correct in pointing out that buying an EDA tool is not like buying a digital camera. Still, there are changes going on in EDA as well. This blog and those of many of my colleagues are now considered product research resources. The work I’ve been doing recently with Xuropa has been aimed at moving part of the sales process, specifically product evaluations, online.  And forums such as TechBites are springing up to provide independent opinions. So maybe there is some cause for my friend’s concern.

As I’ve had time to consider this question since our lunch, I’ve come to feel that salespeople are still needed and will be for some time to come in EDA. Good salespeople know how to find customers, to manage sales campaigns, to manage complex issues, and to ultimately “close the deal”. However, many of their up-front functions will be taken over by other methods, driven by thechnology. As a result, the salesperson will increasingly encounter a more educated customer, one that knows he has alternatives, and one that feels more in control of the sales process than before. Salespeople will have to adapt to that type of customer.

We finished up our lunch and our discussion without reaching any definite conclusions. On the way to our cars I asked him, “mind if I blog about it?”

“Sure.”

So, what do you think? Are sales people really needed?

harry the ASIC guy

To hear long time fan Tony Seminary tell the story, he was embarrassed by the Oregon Ducks performance when they lost to Boise State on the opening night of the 2009 college football season. Not only did they play a sloppy game, gaining only 152 total yards, making only 6 first downs, and committing 2 turnovers, but the whole nation got to see one of their star players punch out a Boise State player on the field after the game.

So what did Tony do? He wrote an email to new Ducks head coach Chip Kelly asking for him to reimburse him for the cost of his round trip from Portland to Boise.

So what did Chip Kelly do? He wrote an email back asking “what’s your address?” A few days later, Tony received a personal check from Chip Kelly for the $439 that Tony had requested.

This happened a few weeks ago, but it just hit the news this week and has gone, dare I say the word, ‘viral’. Among the results of this are the following:

• Customer Loyalty - Tony Seminary sent the check back and has been quoted as saying “I think of Coach Kelly as a totally different person now, I have a different bond with him now thanks to what happened. Let’s just say he lost every game as an Oregon coach. You would never hear me calling for his head. It just wouldn’t happen. The guy showed an incredible amount of class”.
• Team Loyalty - Said Seminary, “I now know why his kids would run through a wall for that guy, because who does what he did, right? That is simply amazing.”
• Personal Reputation - In blogs and articles all over, Chip Kelly is being hailed not only for doing what he did, but for doing it quietly without drawing attention. As one blog said “Chip Kelly, a man of his word.”
• School Reputation - I don’t have any evidence of this as yet, it’s too early, but certainly some of this will rub off on the University of Oregon, in a good way.

The good news was that Oregon had put in charge a man with integrity and they gave him the freedom to respond as he saw fit. But how would most schools and companies have handled something like this? It would have probably gone something like this:

1. Coach receives email and forwards it to the legal department.
2. Lawyers craft a carefully worded response indicating that Oregon regrets the loss but it is not responsible for incidental damages according to the relevant terms and conditions on the ticket that Mr. Seminary tacitly agreed to and should have read.
3. Mr. Seminary vows never to go to another Ducks football game again. He then goes online and tells hundreds of his friends who are Ducks fans the story.
4. One of his friends writes a Oregon Ducks blog and posts the story and the text of the Oregon response email. ESPN picks it up and shows it on Sportscenter.
5. Hundreds of Ducks fans come to the next game with signs saying something like “Win, or give me my money back”.
6. Top recruit hears the story and decides that he’d rather not go to Oregon. Chooses USC instead.
7. Athletic Director resigns.

No matter what business you are in, hire good people with good judgment and give them the freedom to make the customer happy. That kind of service is “priceless”.

harry the ASIC guy

As a kid, I always dreamed of being interviewed after hitting the game winning homerun or jump shot or throwing the game winning touchdown pass. Well, at this point in my life, the likelihood of those dreams is pretty much zilch. But, fortunately, I’ve been able to achieve something almost as great. A one-hour interview on Dee McCrorey’s Big Dreamers! The Reinvent Success Show.

So, after a full weekend of watching college football and then NFL football, and listening to those other guys getting interviewed after the game winning touchdowns, you can sit down at 6pm PDT, and unwind as Dee McCrorey, Risk Guru, Innovation Catalyst, and Business Coach asks me about my career from no-name engineer to “Harry the ASIC Guy”. You can always listen to the recording afterward if the time is inconvenient, but if you tune in live you can actually call into the show and ask questions, make comments, remind me of the $10 I borrowed for lunch and never gave back, whatever.

Honestly, I’m both flattered and embarrassed to have this opportunity. I met Dee just this past July at DAC in the Synopsys Conversation Central booth and we hit it off right away. Even after the sessions were over, Dee stayed and continued to ask questions trying to dig deeper and get at the core the topics we were discussing. She really has a desire to get to the essence of things which is a great asset for an interviewer, so I’m looking forward to some tough questions. She also has a thriving consulting business helping professionals reinvent their careers, both within corporations and individually, so I’m looking forward to working with her professionally as well.

For more information on the show, you can go here. I hope you can join me.

harry the ASIC guy