Posts Tagged ‘DAC’

Dunbar’s Number and #48DAC

Tuesday, June 14th, 2011

DAC Badges

My apologies for the recent hiatus in my blog posting. It’s been a difficult time personally for me the past few months, dealing with family illnesses. Hopefully, I can get it going again.

With all that I had going on, it was a relief to escape last week for a few days to DAC in San Diego. After several years attending as a blogger (what DAC calls “independent media”), it was exciting to be on the floor representing Xuropa at the Synopsys Cloud Partners Booth. I still got to see several friends like JL Gray, who wrote up what he heard from us, and Peggy Aycinena, who accused me of being a sellout since I was in the Synopsys Cloud booth and had a Synopsys badge lanyard. And of course, what DAC would be complete without Eric Thune of AtopTech telling me that cloud will never work for EDA. 

One of the downsides of being in the booth was not being able to attend a lot of the other sessions. I missed The Woz, and the Logan & McLellan show, and Gary Smith, and a lot of the panel discussions. I was, however, able to sneak away for the EDA Cloud Computing Panel discussion, featuring the usual suspects and a few new ones. A highlight was when John Bruggeman of Cadence offered to buy John Chilton of Synopsys a beer at the Denali Party and work out a joint Synopsys/Cadence solution on the cloud. No word yet how that turned out. Another highlight was the audience poll at the end where 1/3 of the audience felt that most of EDA would be on the cloud in 3 years. I don’t know if this is correct or not, but this is the 3rd year we had a cloud panel at DAC, and each year the expectations increase. Richard Goering has a good writeup on the panel.

One booth I did visit and get an interesting demo was Duolog. Duolog is a Xuropa customer (you can try out their tool here), which is why I knew a little about them going in. They have a tool called Socrates Bitwise that does register management for processor based designs. In this tool, you specify all the processor accessible registers, their type (RO, RW, etc), the locations (base and offset), and the tool automatically generates the RTL, verification code (OVM, UVM, etc), register package, C APIs and documentation. If something needs to change, you change it in one place in the tool and all the subsequent files are regernerated correct by construction. With many designs having hundreds or thousands of registers to manage, this is a growing problem to be solved. Duolog has a few competitors as well, but their biggest competition is in-house home-grown scripts.

Of course, there were my 150 closest friends I know from years gone by, too numerous to mention, lest I leave someone out. I’m reminded of Sean Murphy’s perfect description of DAC:

The emotional ambience at DAC is what you get when you pour the excitement of a high school science fair, the sense of the recurring wheel of life from the movie Groundhog Day, and the auld lang syne of a high school re-union, and hit frappe.”

An overall impression I, and many others, had was that the show floor was smaller and there were fewer attendees than in the past. The official preliminary numbers, however indicate that DAC was larger than last year, so I’m not sure whether to believe my eyes or the numbers.

For me personally, it was my annual chance to connect with the entire industry, so I got a lot out of it. At a minimum, it provided me with a lot of good ideas that I can work on for the next year.

harry the ASIC guy

Brian Bailey on Unconventional Blogging

Tuesday, June 15th, 2010

bailey.jpg

(Photo courtesy Ron Ploof

I had the pleasure yesterday of interviewing Brian Bailey in the Synopsys Conversation Central Stage at DAC. We discussed his roots in verification working with the initial developers of digital simulation tools and his blogging experiences these past few years. There are, of course, even a few comments on the difference between journalists and bloggers ;)

You can listen to this half hour interview at the Synopsys Blog Talk Radio site. I’d be interested in your comments on the show and the format as well. It was pretty fun, especially in front of a live audience.

At 12:30 PDT today, I’ll be doing another interview on Security Standards for the Cloud. You can tune in live on your computer or mobile device by going to the main Synopsys Blog Talk Radio Page. So, even if you’re not here at DAC, you can still partake.

harry the ASIC guy

Where in the DAC is harry the ASIC guy?

Friday, June 11th, 2010

dac_logo.pngLast year’s Design Automation Conference was kind of quiet and dull, muted by the impact of the global recession with low attendance and just not a lot of real interesting new developments. This year looks very different; I’m actually having to make some tough choices of what sessions to attend. And with all the recent acquisitions by Cadence and Synopsys, the landscape is changing all around, which will make for some interesting discussion.

I’ll be at the conference Monday through Wednesday. As a rule, I try to keep half of my schedule open for meeting up with friends and colleagues and for the unexpected. So if you want to chat, hopefully we can find some time. Here are the public events that I have lined up:

Monday

10:30 - 11:00 My good friend Ron Ploof will interviewing Peggy Aycinena on the Synopsys Conversation Central stage, so I can’t miss that. They both ask tough questions so that one may get chippy. (Or you can participate remotely live here)

11:30 - 12:00 I’ll be on that same Synopsys Conversation Central stage interviewing Verification Consultant and Blogger Extraordinaire Brian Bailey. Audience questions are encouraged, so please come and participate. (Or you can participate remotely live here)

3:00 - 4:00 I’ll be at the Atrenta 3D Blogfest at their booth. It should be an interesting interactive discussion and a good chance to learn about one of the 3 directions EDA is moving in.

6:00 - Cadence is having a Beer for Bloggers event but I’m not sure where. For the record, beer does not necessarily mean I’ll write good things. (This event was canceled since there is the Denali party that night).

Tuesday

8:30 - 10:15 For the 2nd straight year, a large fab, Global Foundries (last year it was TSMC) will be presenting their ideas on how the semiconductor design ecosystem should change From Contract to Collaboration: Delivering a New Approach to Foundry

10:30 - 12:00 I’ll be at a panel discussion on EDA Challenges and Options: Investing for the Future. Wally Rhines is the lead panelist so it should be interesting as well.

12:30 - 1:00 I’ll be back at the Synopsys Conversation Central stage interviewing James Wendorf (IEEE) and Jeff Green (McAfee) about standards for cloud computing security, one of the hot topics.

Wednesday

10:30 - 11:30 I’ll be at the Starbucks outside the convention floor with Xuropa and Sigasi. We’ll be giving out Belgian Chocolate and invitations to use the Sigasi-Xilinx lab on Xuropa.

2:00 - 4:00 James Colgan, CEO of Xuropa, and representatives from Amazon, Synopsys, Cadence, Berkeley and Altera will be on a panel discussion on Does IC Design have a Future In the Cloud?. You know what I think!

This is my plan. Things might change. I hope I run into some of you there.

harry the ASIC guy

DAC Yesterday, Today, and Tomorrow

Friday, May 28th, 2010

About a week ago, I got an email from someone I know doing a story on how the Design Automation Conference has changed with respect to bloggers since the first EDA Bloggers Birds-of-a-Feather Session 2 years ago. I gave a thoughtful response and some of it ended up in the story, but I thought it would be nice to share my original full response with you.

Has your perception of the differences between bloggers and press changed since the first BOF?

Forget my perception; many of the press are now bloggers! I don’t mean that in a mean way and I understand that people losing their jobs is never a good thing. But I think the lines have blurred because we all find ourselves in similar positions now. It’s not just in EDA … many, if not most, journalists also have a blog that they write on the side.

Ultimately, I think either the traditional “press” or a blog is just a channel between someone with knowledge to people who want information they can trust. What determines trust is the reliability of the source. In thepast, the trust was endowed by the reputation of the publication. Now, weall have to earn that trust.

As for traditional investigative journalism (ala All the President’s Men) and reporting the facts (5 Ws), I think there is still a role for that, butmost readers are looking for insight, not jut the facts.

What do you think of DAC’s latest attempts to address these differences, e.g. Blog-sphere on the show floor, press room in the usual location?

Frankly, I’m not sure exactly what DAC is doing along these lines this year. Last year bloggers had very similar access as journalists to the press room and other facilities. It was nice to be able to find a quiet place to sit, but since most bloggers are not under deadline to file stories it is not as critical. Wireless technology is making a lot of this obsolete since we can pretty much work from anywhere. Still, having the snacks is nice :)

What does the future hold for blogging at DAC?

Two years ago, blogging was the “new thing” at DAC. Last year, blogging was mainstream and Twitter was the new thing. This year blogging will probably be old skool and there will be another “new thing”. For instance, I think we’re all aware and even involved in Synopsys’ radio show. This stuff moves so fast. So, I think the future at DAC is not so much for blogging, as it is for multiple channels of all kinds, controlled not only by “the media”, but also the vendors, independents, etc. Someone attending DAC will be able to use his wireless device to tap into many channels, some in real-time.

Next year, I predict that personalized and location aware services will be a bigger deal. When you come near a booth, you may get an invitation for a free demo or latte if your profile indicates you are a prospective customer. You’ll be able to hold up your device and see a “google goggles” like view of the show floor. You may even be able to tell who among your contacts is at the show and where they are. Who knows? It will be interesting.

harry the ASIC guy

Small Gathering in Monterey

Sunday, April 4th, 2010

There’s going to be a small gathering of luminaries in Monterey this week. And no, it’s not the jellyfish at the Monterey Bay Aquarium.

Jellyfish at Monterey Bay Aquarium

http://www.flickr.com/photos/warthog9/ / CC BY-NC-SA 2.0

It’s the Electronic Design Processes Symposium Workshop. This will be my first time attending and it will be very interesting on several accounts.

First, everyone who has attended in the past has said that it’s truly unique in the industry. It’s not really a conference but a workshop, a small gathering of the best and brightest in EDA exchanging their research and ideas. With only 25-50 participants, it’s not uncommon for someone to  stand up and challenge the presenter or for spontaneous discussions to break out during sessions. It’s not uncommon to meet people who have been thinking about the same problems you’ve considered or someone who has been thinking about problems you never thought existed. And it’s not uncommon to walk away with new insights and revelations and ideas.

Second, there probably are very few, if any, EDA customers attending. This is an EDA workshop for EDA people. There is no trade show. There are no booths to set up. There are no big press releases or sales guys walking up to shake your hand or schlocky giveaways. I imagine that DAC probably started out this way back in the 1960s, but DAC is now more of a trade show that a workshop. This will be back to the grass roots of EDA.

Third, I am going to be moderating one of the sessions, something I’ve not done before (except at my own round table). I’ll be moderating the session entitled “Moving to a Brave New World” which includes a presentation by James Colgan of Xuropa on cloud computing. Obviously, I’m a little biased on that topic, but I’ll try not to let that influence my moderation. I’m sure this and all the other sessions will be very interesting.

Last, I’m going to be traveling with my family. It’s spring break week and so we’re heading up the coast to visit Monterey for a few days, then visit some friends up in Danville. Fortunately there is plenty to do in Monterey and the hotel is right on the beach, so they’ll be fine. So, if you want to meet me or my family, come on over. Registration is still open.

We promise we won’t sting.

harry the ASIC guy

My Obligatory TOP 10 for 2009

Thursday, December 31st, 2009

2009 To 2010

http://www.flickr.com/photos/optical_illusion/ / CC BY 2.0

What’s a blog without some sort of obligatory year end TOP 10 list?

So, without further ado, here is my list of the TOP 10 events, happenings, occurrences, observations that I will remember from 2009. This is my list, from my perspective, of what I will remember. Here goes:

  1. Verification Survey - Last February, as DVCon was approaching, I thought it would be interesting to post a quickie survey to see what verification languages and methodologies were being used. Naively, I did not realize to what extent the fans of the various camps would go to rig the results in their favor. Nonetheless, the results ended up very interesting and I learned a valuable lesson on how NOT to do a survery.
  2. DVCon SaaS and Cloud Computing EDA Roundtable - One of the highlights of the year was definitely the impromptu panel that I assembled during DVCon to discuss Software-as-a-Service and Cloud Computing for EDA tools. My thanks to the panel guests, James Colgan (CEO @ Xuropa), Jean Brouwers (Consultant to Xuropa),  Susan Peterson (Verification IP Marketing Manager @ Cadence), Jeremy Ralph (CEO @ PDTi), Bill Alexander (VP Marketing @ Blue Pearl Software), Bill Guthrie (VP Marketing @ Numetrics). Unfortunately, the audio recording of the event was not of high enough quality to post, but you can read about it from others at the following locations:

    > 3 separate blog posts from Joe Hupcey (1, 2, 3)

    > A nice mention from Peggy Aycinena

    > Numerous other articles and blog posts throughout the year that were set in motion, to some extent, by this roundtable

  3. Predictions to the contrary, Magma is NOT dead. Cadence was NOT sold. Oh, and EDA is NOT dead either.
  4. John Cooley IS Dead - OK, he’s NOT really dead. But this year was certainly a turning point for his influence in the EDA space. It started off with John’s desperate attempt at a Conversation Central session at DAC to tell bloggers that their blog sucks and convince them to just send him their thoughts. For those who took John up on his offer by sending their thoughts, they would have waited 4 months to see them finally posted by John in his December DAC Trip report. I had a good discussion on this topic with John earlier this year, which he asked me to keep “off the record”. Let’s just say, he just doesn’t get it and doesn’t want to get it.
  5. The Rise of the EDA Bloggers.
  6. FPGA Taking Center Stage - It started back in March when Gartner issued a report stated that there were 30 FPGA design starts for every ASIC start. That number seemed very high to me and to others, but that did not stop this 30:1 ratio from being quoted as fact in all sorts of FPGA marketing materials throughout the year. On the technical side, it was a year where the issues of verification of large FPGAs came front-and-center and where a lot of ASIC people started transitioning to FPGA.
  7. Engineers Looking For Work - This was one of the more unfortunate trends that I will remember from 2009 and hopefully 2010 will be better. Personally, I had difficulty finding work between projects. DAC this year seemed to be as much about finding work as finding tools. A good friend of mine spent about 4 months looking for work until he finally accepted a job at 30% less pay and with a 1.5 hour commute because he “has to pay the bills”. A lot of my former EDA sales and AE colleagues have been laid off. Some have been looking for the right position for over a year. Let’s hope 2010 is a better year.
  8. SaaS and Cloud Computing for EDA - A former colleague of mine, now a VP of Sales at one of the small but growing EDA companies, came up to me in the bar during DAC one evening and stammered some thoughts regarding my predictions of SaaS and Cloud Computing for EDA. “It will never happen”. He may be right and I may be a bit biased, but this year I think we started to see some of the beginnings of these technologies moving into EDA. On a personal note, I’m involved in one of those efforts at Xuropa. Look for more developments in 2010.
  9. Talk of New EDA Business Models - For years, EDA has bemoaned the fact that the EDA industry captures so little of the value ($5B) of the much larger semiconductor industry ($250B) that it enables. At the DAC Keynote, Fu-Chieh Hsu of TSMC tried to convince everyone that the solution for EDA is to become part of some large TSMC ecosystem in which TSMC would reward the EDA industry like some sort of charitable tax deduction. Others talked about EDA companies having more skin in the game with their customers and being compensated based on their ultimate product success. And of course there is the SaaS business model I’ve been talking about. We’ll see if 2010 brings any of these to fruition.
  10. The People I Got to Meet and the People Who Wanted to Meet Me- One of the great things about having a blog is that I got to meet so many interesting people that I would never have had an opportunity to even talk to. I’ve had the opportunity to talk with executives at Synopsys, Cadence, Mentor, Springsoft, GateRocket, Oasys, Numetrics, and a dozen other EDA companies. I’ve even had the chance to interview some of them. And all the fellow bloggers I’ve met and now realize how much they know. On the flip side, I’ve been approached by PR people, both independent and in-house. I was interviewed 3 separate times, once by email by Rick Jamison, once by Skype by Liz Massingill, and once live by Dee McCrorey. EETimes added my blog as a Trusted Source. For those who say that social media brings people together, I can certainly vouch for that.

harry the ASIC guy

DAC Theme #3 - “Increasing Clouds Over SF Bay”

Sunday, August 16th, 2009

Clouds over San FranciscoIt was easy to spot the big theme’s at DAC this year. This was the “Year of ESL” (again). The state of the economy and the future of EDA was a constant backdrop. Analog design was finally more than just Cadence Virtuoso. And social media challenged traditional media.

It was harder to spot the themes that were not front and center, that were not spotlighted by the industry beacons, that were not reported by press or bloggers. Still, there were important developments if you  looked in the right places and noticed what was changing. At least one of those themes came across to me loud and clear. This was the year that the clouds started forming over EDA.

If you’ve read my blog for a while, you know I’m not talking about the weather or some metaphor for the health of the EDA industry. You know I am talking about cloud computing, which moved from crazy idea of deluded bloggers to solidly in the early adopter category. Though this technology is still “left of chasm”, many companies were talking about sticking their toes in the waters of cloud computing and some even had specific plans to jump in. Of note:

  • Univa UD - Offering a “hybrid cloud” approach to combine on premise hardware and public cloud resources. Many view this as the first step into the cloud since it is incremental to existing on premise hardware.
  • Imera Systems - Offering a product called EDA Remote Debug that enables an EDA company to place a debug version of their software on a customer’s site in order to debug a tool issue. This reduces the need to send an AE on site or to have the customer package up a testcase.
  • R Systems - A spinoff from the National Center for Supercomputing Applications (best known for Telnet and Mosaic), they were wandering the floor pitching their own high performance computing resources (that they steadfastly insisted were “not a cloud”) available remotely or brought to your site to increase your computing capacity.
  • Cadence - One of the first (after PDTi) to have an official Hosted Design Solutions offering, they host their software and your data in a secure datacenter and are looking at the cloud as well for the future.

And then there’s Xuropa.

Before I cover Xuropa, I need to take a brief digression. You see, July 27th was not just the first day of DAC. It was also my first official day working for Xuropa as one of my clients. I’ll be doing social media consulting (blogging, tweeting, other online social community stuff) and also helping their customers get their tools on the Xuropa platform. This is very exciting for me, something I’ll blog about specifically on the Xuropa Blog and also here. In the meantime, under full disclosure, you’ve now been told. You can factor in the appropriate amount of skepticism to what I have to say about cloud computing, hosted design, Software-as-a-Service and Xuropa.

  • Xuropa - Offering to EDA companies and IP providers the ability to create secure online labs in the cloud for current and prospective customers to test drive a tool, do tool training, etc. They also have plans to make the tools available for “real work”.

These companies and technologies are very exciting on their own. Still, the cloud computing market is very new and there is a lot of churn so it is very difficult to know what will survive or become the standard. Perhaps something not even on this list will emerge.

Even though the technology side is cloudy (pun intended), the factors driving companies to consider using the cloud are very clear. They all seem to come down to one economic requirement. Doing more with less. Whenever I speak to people about cloud computing (and I do that a lot) they always seem to “get it” when I speak in terms of doing more with less. Here are some examples:

  • I spoke to an IT person from a large fabless semiconductor company that is looking at cloud computing as a way to access more IT resources with less of an on premise hardware datacenter.
  • Cadence told me that their Hosted Design Solutions are specifically targeted at smaller companies that want to be able to access a complete EDA design environment (hardware, software, IT resources) without making any long-term commitment to the infrastructure.
  • EDA and IP companies of all sizes are looking to reduce the cost of customer support while providing more immediate and accessible service.
  • EDA and IP companies are looking to go global (e.g. US companies into Europe and Asia) without hiring a full on sales and support team.
  • Everyone is trying to reduce their travel budgets.

Naysayers point out that we’ve seen this trend before. EDA companies tried to put their tools in datacenters. There were Application Service Providers trying to sell Software-as-a-Service. These attempts failed or the companies moved into other offerings. And so they ask (rightly) “what is different now?”

There is certainly a lot of new technology (as you see above) that help to make this all more secure and convenient than it was in the past. We live in a time of cheap computing and storage and ubiquitous internet access which makes this all so much more affordable and accessible than before. And huge low cost commodity hardware data centers like those at Amazon and Google never existed before now. But just because all this technology exists so that it can be done, doesn’t mean it will be done.

What is different is the economic imperative to do more with less. That is why this will happen. If cloud computing did not exist, we’d have to invent it.

harry the ASIC guy

DAC Theme #2 - “Oasys Frappe”

Monday, August 10th, 2009

Sean Murphy has the best one sentence description of DAC that I have ever read:

FrappeThe emotional ambience at DAC is what you get when you pour the excitement of a high school science fair, the sense of the recurring wheel of life from the movie Groundhog Day, and the auld lang syne of a high school re-union, and hit frappe.

That perfectly describes my visit with Oasys Design Systems at DAC.

Auld Lang Syne

When I joined Synopsys in June of 1992, the company had already gone public, but still felt like a startup. Logic synthesis was going mainstream, challenging schematic entry for market dominance. ASICs (they were actually called gate arrays back then) were heading towards 50K gates capacity using 0.35 uM technology. And we were aiming to change the world by knocking off Joe Costello’s Cadence as the #1 EDA company.

As I walked through the Oasys booth at DAC, I recognized familiar faces. A former Synopsys sales manager, now a sales consultant for Oasys. A former Synopsys AE, now managing business development for Oasys. And not to be forgotten, Joe Costello, ever the Synopsys nemesis, now an Oasys board member. Even the company’s tag line “the chip synthesis company” is a takeoff on Synopsys’ original tag line “the synthesis company”. It seemed like 1992 all over again … only 17 years later.

Groundhog Day

In the movie Groundhog Day, Bill Murray portrays Phil, a smug, self-centered, yet popular TV reporter who is consigned by the spirits of Groundhog Day to relive Feb 2nd over and over. After many tries, Phil is finally able to live a “perfect day” that pleases the spirits and he is able to move on, as a better person, to Feb 3rd.

As I mentioned in a previous post, I’ve seen this movie before. In the synthesis market, there was Autologic on Groundhog Day #1. Then Ambit on Groundhod Day #2. Then Get2chip on Groundhod Day #3. Compass had a synthesis tool in there somewhere as well. (I’m sure Paul McLellan could tell me when that was.) None of these tools, some of which had significant initial performance advantages, were able to knock off Design Compiler as market leader. This Groundhog Day it’s Oasys’ turn. Will this be the day they finally “get it right”?

Science Fair

A good science fair project is part technology and part showmanship. Oasys had the showmanship with a pre-recorded 7-minute rock medley featuring “Bass ‘n’ Vocal Monster” Joe Costello, Sanjiv “Tropic Thunder” Kaul, and Paul “Van Halen” Besouw. Does anyone know if this has been posted on Youtube yet?

On the technology side, I had one main mission at the Oasys booth … to find out enough about the RealTime Designer product to make my own judgment whether it was “too good to be true”. In order to do this, I needed to get a better explanation of the algorithms working on “under-the-hood”, which I was able to get from founder Paul van Besouw.

For the demo, Paul ran on a Dell laptop with a 2.2 GHz Core Duo processor, although he claims that only 1 CPU was used. The demo design was a 1.6M instance design based on multiple instantiations of the open source Sparc T1 processor. The target technology was the open source 45nm Nangate library. Parts of the design flow ran in real time as we spoke about the tool, but unfortunately we did not run through the entire chip synthesis on his laptop in the 30 minutes I was there, so I cannot confirm the actual performance of the tool. Bummer.

Paul did describe, though, in some detail, the methods that enable their tool to achieve such fast turnaround time and high capacity. For some context, you need to go back in time to the origins and evolution of logic synthesis.

At 0.35 uM, gate delays were 80%+ of the path delay and the relatively small wire delays could be estimated accurately enough using statistical wire load models. At 0.25 uM, wire delays grew as a percentage of the path delay. The Synopsys Floorplan Manager tool allowed front-end designers to create custom wire load models from an initial floorplan. This helped maintain some accuracy for a while, but eventually was also too inaccurate. At 180 nM and 130 nM, Physical Compiler (now part of IC Compiler) came along to do actual cell placement and estimate wire lengths based on a global route. At 90 nM and 65 nM came DC-Topographic and DC-Graphical, further addressing the issues of wire delay accuracy and also layout congestion.

These approaches seem to work well, but certain drawbacks are starting to appear:

  1. Much of the initial logic optimization takes place prior to placement, so the real delays (now heavily dependent on placement) are not available yet.
  2. The capacity is limited because the logic optimization problem scales faster than order(n). Although Synopsys has come out with methods to address the turnaround time issue, such as automatic chip synthesis, these approaches amount to not much more than divide and conquer (i.e.budget and compile).
  3. The placement developed by the front-end synthesis tool (e.g. DC-Topographic) is not passed on to the place and route tool. As a result, once you place the design again in the place and route tool, the timing has changed.

According to Paul van Besouw, Oasys decided to take an approach they call “place first”. That is, rather than spend a lot of cycles in logic optimization before even getting to placement, they do an initial placement of the design as soon as possible so they are working with real interconnect delays from the start. Because of this approach, RealTime Designer can get to meaningful optimizations almost immediately in the first stage of optimization.

A second key strategy according to van Besouw is the RTL partitioning which chops the design up into RTL blocks that are floorplaned and placed on the chip. The partitions are fluid, sometimes splitting apart, sometimes merging with other partitions during the optimization process as the design demands. The RTL can be revisited and changed for a new structure during the optimization as well. Since the RTL partitions are higher-level than gates, the number of design objects in much fewer, leading to faster runtime with lower memory foot print according to van Besouw. Exactly how Oasys does the RTL partitioning and optimizations is the “secret sauce”, so don’t expect to hear a lot of detail.

Besides this initial RTL optimization and placement, there are 2 more phases of synthesis in which the design is further optimized and refined to a legal placement. That final placement can be taken into any place and route tool and give you better results than the starting point netlist from another tool, says van Besouw.

In summary, Oasys claims that they achieve faster turnaround time and higher capacity by using a higher level of abstraction (RTL vs. gate). They claim that they can achieve a better starting point for and timing correlation with place and route because they use actual placement from the start and feed that placement on to the place and route tool. And the better placement also runs faster because it converges faster.

What Does Harry Think?

Given the description that I got from Oasys at DAC, I am now convinced that it is “plausible” that Oasys can do what they claim. Although gory detail is still missing, the technical approach described above sounds exactly right, almost obvious when you think about it. Add to that the advantage of starting from scratch with modern coding languages and methods and not being tied to a 20 year old code base, and you can achieve quite a bit of improvement.

However, until I see the actual tool running for myself in a neutral environment on a variety of designs and able to demonstrate faster timing closure through the place and route flow, I remain a skeptic. I’m not saying it is not real, just that I need to see it.

There are several pieces of the solution that were not addressed adequately, in my opinion:

  1. Clock tree synthesis - How can you claim to have a netlist and placement optimized to meet timing until you have a clock tree with its unique slew and skew. CTS is not address in this solution. (To be fair, it’s not addressed directly in Design Compiler either).
  2. A robust interface to the backend - Oasys has no backend tools in-house, which means that the work they have done integrating with 3rd party place and route has been at customer sites, either by them or by the customer. How robust could those flows be unless they have the tools in-house (and join the respective partner programs).
  3. Bells and whistles - RealTime designer can support multi-voltage, but not multi-mode optimization. Support for low power design is not complete. What about UPF? CPF? All of these are important in a real flow and it is not clear what support Oasys has.
  4. Tapeouts - This is probably the key question. For as long as EDA has existed, tapeouts have been the gold standards by which to evaluate a tool and its adoption. When I asked Paul if there are any tapeouts to date, he said “probably”. That seems odd to me. He should know.

However, if Oasys can address these issues, this might actually be the game changer that gets us out of the Groundhog Day rut and onto a new day.

harry the ASIC guy

DAC Theme #1 - “The Rise of the EDA Bloggers”

Sunday, August 2nd, 2009

Harry Gries at Conversation Central

(Photo courtesy J.L. Gray

Last year, at the Design Automation Conference, there were only a couple dozen individuals who would have merited the title of EDA blogger. Of those, perhaps a dozen or so wrote regularly and had any appreciable audience. In order to nurture this fledgling group, JL Gray (with the help of John Ford, Sean Murphy, and yours truly) scrounged a free room after-hours in the back corner of the Anaheim Convention Center in which to hold the first ever EDA Bloggers Birds-of-a-Feather session. At this event, attended by both bloggers and traditional journalists, as John Ford put it, us bloggers got our collective butts sniffed by the top dog journalists.

My, how things have changed in just one year.

This year at DAC, us EDA bloggers (numbering 233 according to Sean Murphy) and other new media practitioners took center stage:

  • Bloggers were literally on stage at the Denali party as part of an EDA’s Next Top Blogger competition.
  • Bloggers were literally center stage at the exhibits, in the centrally located Synopsys booth, engaging in lively conversation regarding new media.
  • Atrenta held a Blogfest.
  • There was a Pavillion Panel dedicated to tweeting and blogging.
  • And most conspicuously, there was the 14-foot Twitter Tower streaming DAC related tweets.

Meanwhile, the traditional journalists who were still covering DAC seemed to fall into 2 camps. There were those who embraced the bloggers as part of the media and those that didn’t. Those that did, like Brian Fuller, could be found in many of the sessions and venues I mentioned above. Those that did not, could be found somewhere down the hall between North and South halls of Moscone in their own back corner room. I know this because I was given access to the press room this year and I did indeed find that room to be very valuable … I was able to print out my boarding pass on their printer.

Here’s my recap of the new media events:

I had mixed feelings regarding the Denali Top Blogger competition as I know others did as well. JL, Karen, and I all felt it was kind of silly, parading like beauty queens to be judged. Especially since blogging is such a collaborative, rather than competitive, medium. So often we reference and riff off of each other’s blog posts. Still, I think it was good recognition and publicity for blogging in EDA and one could not argue with the legitimacy of the blogger representatives, all first-hand experts in the areas that they cover. Oh, by the way, congratulations to Karen Bartleson for winning the award.

Conversation Central, hosted by Synopsys, was my highlight of DAC.  It was a little hard to find (they should have had a sign), located in a little frosted glass room on the left front corner of the Synopsys booth. But if you could find your way there, it was well worth the search. I’m a little biased since I hosted conversations there Monday - Wednesday on “Job Search: How Social Media Can Help Job Seekers & Employers”. The sessions were a combination of specific advice and lively discussions and debates. I was fortunate to have a recruiter show up one day and a hiring manager another day to add their unique perspectives. I think that that was the real power of this very intimate kitchen table style format. Everybody felt like they were allowed to and even encouraged to participate and add their views into the discussions. This is very different from a very formal style presentation and even panel discussions.

Unfortunately, I was not able to clone myself in order to attend all the sessions there, many of which I heard about afterwards from others or in online writeups. I did attend the session by Ron Ploof entitled “Objectivity is Overrated: Corporate Bloggers Aren’t Journalists, & Why They Shouldn’t Even Try”. Interestingly enough, no journalists showed up to the session. Still, it was a lively discussion, the key point being that bloggers don’t just talk the talk, they walk the walk, and therefore bring to the table a deeper understanding and experience with EDA and design than a journalist, even one that was previously a designer.

I also attended Rick Jamison’s session on “Competitors in Cyberspace: Why Be Friends?” which attracted several Cadence folks (Joe Hupcey, Adam Sherer, Bob Dwyer) and some Mentor folks. Although competitors for their respective companies, there was a sense of fraternity and a lot of the discussion concerned what is “fair play” with regards to blog posting and commenting. The consensus was that advocacy was acceptable and even expected from the partisans, as long as it could be backed up by fact and kept within the bounds of decorum (i.e. no personal attacks). EDA corporate bloggers have been very fair in this regards in contrast to some rather vitriolic “discussions” in other industries.

The Atrenta Blogfest sounded very interesting and I was very disappointed that I could not attend because it conflicted with my Conversation Central discussion. Mike Demler has a brief summary on his blog as does Daniel Nenni on his blog.

Late Wednesday, Michael Sanie hosted a DAC Pavillion Panel entitled “Tweet, Blog or News: How Do I Stay Current?” Panelists Ron Wilson (Practical Chip Design in EDN), John Busco (John’s Semi-Blog) and Sean Murphy (his blog) shared insights into the ways they use social media to stay current with events in the industry, avoid information overload, and separate fact from fiction. Ron Wilson commented that social networks are taking the place of the socialization that engineers used to get by attending conferences and the shared experience reading the same traditional media news. John Busco, the recognized first EDA blogger, shared how he keeps his private life and his job at NVidia separate from his blogging life. And Sean Murphy gave perspective on how blogging has grown within EDA and will continue to grow to his projection of 500 EDA bloggers in 2011.

Last, but not least, there was the Twitter Tower, located next to the Synopsys booth. Previous conferences, such as DVCon attempted to use hashtags (#DVCon) to aggregate conference related tweets. The success was limited, attracting perhaps a few dozen tweets at most. This time, Karen Bartleson had a better idea. Appeal to people’s vanity. The Twitter Tower displayed a realtime snapshot of all tweets containing “#46DAC“, the hashtag designated for the 46th DAC. If one stood in front of the tower and tweeted with this hastag, the tweet would show up within seconds on the tower. How cool is that? Sure it was a little gimmicky, but it made everyone who passed by aware of this new standard. As I write this, there have been over 1500 tweets using the #46DAC hashtag.

If you want to read more, Sean Murphy has done the not-so-glamorous but oh-so-valuable legwork of compiling a pretty comprehensive roundup of the DAC coverage by bloggers and traditional press. (Thanks Sean!)

harry the ASIC guy

Coffee, Jobs, and DAC

Sunday, July 26th, 2009

Coffeeshop

I’m writing to you today from a Coffee Bean & Tea Leaf in beautiful Southern California. There’s something about the atmosphere at a coffee shop that helps me get my thoughts together. Maybe it’s the white noise of the cappuccino machines or the conversations or music in the background.

I’m not the only one of course. Daniel Nenni and his two great danes can often be found at the downtown Danville Starbucks. And like the show Cheers, there are regulars at my local coffee shop that I see most days I am here. Sales people and college students come here a lot. And there has been a noticeable increase in another group. People out of work or “in transition”. In fact, as I glance over to the next table, I see a woman working on her resume. No lie.

Despite the uncertainty, I’ve actually benefited from the opportunity to take a one month break between projects, something I never got as a full-time employee. I’ve been able to catch up with old friends and colleagues on the phone, or over coffee, lunch, or some beers. I’ve also been able to start up some new business opportunities that you’ll be hearing more about in the near future. It never hurts to have multiple irons in the fire, especially in today’s economy.

Which brings me to the topic of jobs. I don’t care what any politician or semiconductor analyst or economist says or what the Dow or NASDAQ is at today. The high tech jobs market sucks. When I ask my very experienced friends and colleagues “what’s happening” they tell me they “can’t find no work, can’t find no job, my friend”. (Marvin Gaye fans will get the reference). Here are some examples:

  • Al Magnani, a friend in the Bay Area with 23 years experience, educated at MIT, USC, and Carnegie-Mellon, an expert in computer architecture, networking, and graphics processing, who’s led dozens of ASIC design developments, who’s been a Director managing a total team of over 50 people, has gone through almost all of his 229 LinkedIn contacts and has not even been able to get an interview in almost 2 months.
  • Jon Atwood, former VP of Sales at Synopsys and a man who has so much EDA experience that he remembers Joe Costello before he played guitar, has been looking for almost 6 months and has started a blog called Job Search 2.0 chronicling his job search adventure. He’s even been on ABC news talking about his employment woes.
  • I’ve received emails from several other very experienced designers, both employees and independent consultants, who tell similar stories of months looking for work.
  • On a personal level, as I have been looking for that “next project”, I have encountered much of the same, and count myself lucky that I actually have a next project to work on.

Having talked to so many of these people and recruiters, here is how I assess the high-tech job situation today:

  • There are a lot more job seekers than jobs out there. OK, that’s obvious. But to give you an idea, of the magnitude, my recruiter friend says she receives hundreds of resumes for every job posted and there are usually many, sometimes dozens of, qualified candidates to choose from.
  • Many of the job postings are soft. That is, the employer does not need to hire someone right away but just has the job posted in case the perfect candidate comes along.
  • Employers are looking for the perfect candidate to come along. If they have 10 requirements for the position, and you meet 9 of them, you are probably on the B-list. And not only are they looking for the right experience, they want you to have been doing pretty much the same job very recently, not 2 years ago.
  • Submitting your resume to a corporate website is a waste of time. Even if you are perfectly qualified, recruiters get too many job postings and your resume may not even get looked at because they run out of time and already have many candidates.
  • Experience counts … against you. Many employers are looking for younger people who don’t have high salary expectations and will work long hours and travel. In fact, I spoke to a recruiter that was retained by a recent chip synthesis startup that told me that he was only looking for candidates with <5 years experience to be an AE at that company. They are not the only ones.
  • Employers hold all the cards. I heard today about someone who accepted a job at 10% less than she was currently making. Don’t expect to make more or even as much as you made before. Don’t expect stock options or signing bonuses. And don’t expect more than 24 hours to make a decision on an offer because there is someone on-deck.

So, with the news that bad, it would be easy to get discouraged. I have been discouraged, for myself and for my friends. Still, here are a few tips that I think will help:

  1. Update your online identity. Every recruiter and hiring manager will do 2 things before they ever pick up the phone and call you. They will Google your name and they will search for you on LinkedIn. Space prohibits me from going into the details of how to do this, but believe me that this is critical. If you want to see an example, you can see my LinkedIn profile.
  2. Find someone in the company who can introduce you or your resume to the hiring manager with a recommendation. This has always been the best way to find a job, but today it is the only way. As I said, the odds of you making it through the corporate website and HR are very low. LinkedIn can help tremendously since you can identify easily who you know at a target company and also whether your contacts know somebody there to whom they can introduce you.
  3. Let your contact refer you before you submit anything to the corporate website. Even in this economy, many companies still give bonuses to employees who refer candidates. If you let your contact get the referral bonus, he will be more likely to help you find the right people in the company to talk to and even sell you to them.
  4. Sign up for job boards. I know that everyone else is using these, but there are still real jobs posted there and you can get an idea which companies are hiring and then use your networking skills to get in the door. Simplyhired and even craigslist are good.
  5. Be willing to take a step back to go forward. You will probably need to a take a cut in pay or take on a position with less responsibility or prestige than you currently have. Accept it. I have a friend who refused to look at jobs that paid less than he previously made. He ended up out of work for 6 months and then ended up taking a lower paying job anyway. It’s more important that you get a job you can do well and that the company has a good outlook going forward.
  6. Help others find a job. You can file this under good karma, or pay it forward, or just plain being a mentsch. If you come across a position for which someone you know would be a good fit, let them know, help them out. It will make you feel a little better and you’ll have made a loyal friend who may be in a position to help you out one day soon.
  7. Get into social networking. I’ll be talking about this more at DAC, but for now, look for opportunities to get on Twitter. Start reading, commenting on, or even writing a blog. Join relevant LinkedIn groups. Join online communities like those at Synopsys, Mentor, and Cadence or independent ones like OVMWorld or Xuropa.
  8. Keep up your skills. There are so many free webinars and opportunities to keep up-to-date that you have no excuse. Check out the Mentor Displaced Worker program.
  9. Consider doing some free work. I know that does not sound great, but you can possibly learn something new in the process and at least avoid having a gap in your resume (remember how picky employers are).
  10. Decide if you are willing to relocate or travel. If you are only looking for positions within your commuting distance then that limits your opportunities.

For those of you who will be attending DAC this coming week, I will be in the Synopsys Conversation Central booth Monday, Tuesday, and Wednesday at 1:30 hosting a conversation on Using Social Media for Job Seekers and Employers.

Please stop and we can talk over a cup of coffee.

harry the ASIC guy