Posts Tagged ‘DAC’

What Makes DAC 2009 different from other DACs?

Sunday, July 12th, 2009

By Narendra (Nari) Shenoy, Technical Program Co-Chair, 46th DAC

Each year, around this time, the electronic design industry and academia meticulously prepare to showcase the latest research and technologies at the Design Automation Conference. For the casual attendee, after a few years the difference between the conferences of years past begins to dim. If you are one of them, allow me to dispel this notion and invite you to look at what is different this year.

For starters, we will be in the beautiful city of San Francisco from July 26-31. The DAC 2009 program, as in previous years, has been thoughtfully composed from using two approaches. The bottom up approach selects technical papers from a pool of submissions using a rigorous review process. This ensures that only the best technical submissions are accepted. For 2009, we see an increasing focus on research towards system level design, low power design and analysis, and physical design and manufacturability. This year, a special emphasis for the design community has been added to the program, with a User Track that runs throughout the conference. The new track, which focuses on the use of EDA tools, attracted 117 submissions reviewed by a committee made up of experienced tool users from the industry. The User Track features front end and back end sessions and a poster session that allows a perfect opportunity to interact with presenters and other DAC attendees. In addition to the traditional EDA professionals, we invite all practitioners in the design community – design tool users, hardware and software designers, application engineers, consultants, and flow/methodology developers, to come join us.

This first approach is complemented by a careful top-down selection of themes and topics in the form of panels, special sessions, keynote sessions, and management day events. The popular CEO panel returns to DAC this year as a keynote panel. The captains of the EDA industry, Aart deGeus (Synopsys), Lip-Bu Tan (Cadence) and Walden Rhines (Mentor) will explore what the future holds for EDA. The keynote on Tuesday by Fu-Chieh Hsu (TSMC), will discuss alignment of business and technology models to overcome design complexity. William Dally (Nvidia and Stanford) will present the challenges and opportunities that throughput computing provides to the EDA world in his keynote on Wednesday. Eight panels on relevant areas are spread across the conference. One panel explores whether the emphasis on Design for Manufacturing is a differentiator or a distraction. Other panels focus on a variety of themes such as confronting hardware-dependent software design, analog and mixed signal verification challenges, and various system prototyping approaches. The financial viability of Moore’s law is explored in a panel, while another panel explores the role of statistical analysis in several fields, including EDA. Lastly, we have a panel exploring the implications of recent changes in the EDA industry from an engineer’s perspective.

Special technical sessions will deal with a wide variety of themes such as preparing for design at 22nm, designing circuits in the face of uncertainty, verification of large systems on chip, bug-tracking in complex designs, novel computation models and multi-core computing. Leading researchers and industry experts will present their views on each of these topics.

Management day includes topics that tackle challenges and decision making in a complex technology and business environment. The current “green” trend is reflected in a slate of events during the afternoon of Thursday July 30th. We start with a special plenary that explores green technology and its impact on system design, public policy and our industry. A special panel investigates the system level power design challenge and finally a special session considers technologies for data centers.

Rather than considering it a hindrance to attendance, the prolonged economic malaise this year should provide a fundamental reason to participate at DAC. As a participant in the technical program, DAC offers an opportunity to share your research and win peer acclaim. As an exhibitor, it is an ideal environment to demonstrate your technology and advance your business agenda. As an attendee, you cannot afford to miss the event where “electronic design meets”. DAC provides an unparalleled chance to network and learn about advances in electronic design for everyone. Won’t you join us at the Moscone Center at the end of the month?

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This year’s DAC will be held July 26-31 at the Moscone Center in San Francisco. Register today at www.dac.com. Note also that there are 600 free DAC passes being offered courtesy of the DAC Fan Club (Atrenta, Denali, Springsoft) for those who have no other means to attend.

Why I’m a Blogger and Not an EDA Idol

Tuesday, July 7th, 2009

(WARNING: What you are about to hear is very disturbing. You may want to remove any children, pets, or small farm animals before listening to the audio in this blog post. You’ve been warned.)

Several years ago, I was driving home from a family vacation when I accidentally speed dialed my boss on the cell phone. His voice mail picked up just as I was singing in the car to my daughter. I had no idea what had occurred until a month later at a staff meeting when he got up in from of my team and my colleagues and played this audio track.

Now you know why I am not trying to become the next EDA Idol at this year’s Design Automation Conference!

Top BloggerFortunately, there is another tongue-in-cheek contest that I am honored to be part of, EDA’s Next Top Blogger.

In case you can’t make DAC this year, I’d like to introduce you to the fellow nominees because they are all great writers and experts in their domains. I encourage you to read these blogs and subscribe to the ones that you find valuable. And look beyond this list because there are many more out there.

Colin Warwick is a Product Marketing Manager at Agilent EEsof EDA group. Colin’s Signal Integrity blog is about signal integrity tips, tricks, and tutorial for multigigabit/s chip-to-chip data links. It includes videos (technical and humorous), tutorial articles, interactive calculators and polls, reviews, and product and event information.

John Busco is a Design Implementation Manager at NVidia. Blogging since 2005, John’s Semi-Blog shares high quality news and opinion about semiconductors and EDA. John is hands-on working in the trenches on the bleeding edge designs, so you can trust what he tells you.

Paul McLellan  has been an executive in EDA and Semiconductors with companies like VLSI Technologies, Compass, Ambit, Cadence,and on and on. His EDA Graffiti blog covers EDA and semiconductor, looking back to some history, analyzing the industry and looking where things are likely to end up. I always walk away from Paul’s blog posts with something to think about.

Daniel Nenni is also an EDA industry veteran with similarly impressive credentials. Although his Silicon Valley Blog is fairly new, Daniel writes like a verteran blogger, sharing his 25+ years of experience in semiconductor design and manufacture in an entertaining manner. He manages to share some of his personal life observations as well.

Karen Bartleson is Director of Community Marketing at Synopsys. Since November 2007, she has presented news, insights, and opinions on the topic of EDA standards in her ever popular The Standards Game blog. Karen is also spearheading Synopsys’ Conversation Central at DAC where you can exchange ideas with many of these same top bloggers (and many more) about how social media is changing the media landscape.

Frank Schirrmeister is Director of Product Marketing and System-Level Solutions at Synopsys. His A View From The Top blog is dedicated to System-Level Design and Embedded Software and deals with the technology and business aspects to get us to ESL and the next abstraction level eventually!

JL Gray is a hands-on verification consultant at Verilab. In his Cool Verification blog, which set the standard for independent blogging in EDA, JL shares this thoughts on hardware verification, the EDA industry, and related topics. JL spearheaded the EDA Blogger Birds-of-a-Feather session at DAC last year and sits on the ever popular Accellera Verification IP Technical Subcommittee.

I have 2 favors to ask. First, please check out some these wonderful bloggers (and some of the others you can find on David Lin’s EDA Blog Roll) who devote their evenings and weekends writing for free (well, about half of us) to bring you valuable information you can’t get anywhere else. Then, show your support by voting for your favorite blog and telling a friend or a co-worker about all this great content out there. Please vote for whoever you want, but remember, if I lose, I might have to sing next year. And you don’t want that!

(Note: The Denali site requires you to enter a Captcha phrase and also your valid email address in order to ensure that people only vote once. The email address WILL NOT be used for any other purpose, so please do not be dissuaded from voting because of this).

harry the ASIC guy

Mentor Is Listening

Thursday, June 11th, 2009

My morning routine is pretty, well, routine.

Get up.  Wake the kids.

Check email.  Ask the kids to stop jumping on the couch.

Check Twitter. Tell the kids again to stop jumping on the couch.

Check my Google Reader. Glare at the kids with that “I’ve asked you for the last time” look.

You get the idea.

This Wednesday morning, somewhere in between conversations with my kids, walking the dog, and getting ready for work, I came across the following comment on a friend’s blog:

Ron, we are listening.

http://www.mentor.com/blogs

Ron Fuller
Web Manager, Mentor Graphics

For background, Ron Ploof is the guy who got the crazy idea almost 3 years ago that Synopsys should be doing something in this new world called social media. (Actually, I don’t think the term “social media” had even been coined back then). He evangelized this belief to the VP of Marketing at Synopsys and created for himself a job as Synopsys’ “New Media Evangelist” (actual title on his business card). He launched Synopsys’ first foray into social media, including podcasts, videos, and most prominently, blogs.

Synopsys’ success motivated Cadence to follow suit (something confided to me by Cadence’s former community manager). And it seems, according to the comment on Ron’s blog, it also motivated Mentor’s move into social media.

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I wanted to find out more about the Mentor blogs and I was able to set up some time to talk over lunch with Sonia Harrison at Mentor (see her sing at the Denali DAC party) . Sonia had helped me set up my previous interview with Paul Hofstadler and had extended me an invitation to attend the Mentor User2User conference (which, unfortunately, I could not attend). As it turns out, Sonia was the absolutely right person to talk to.

Even though I had only now become aware of Mentor blogs, Mentor had evidently coordinated their launch with the launch of their new website several months ago. Sonia was quite humble, but it seems that she was the driving force behind the blogs and Mentor’s presence in other social media like Twitter. She had been watching what was going on for some time, hesitant to jump in without a good plan, and now was the time.

According to Sonia, Mentor’s motivation for doing the blogs was to extend into a new media their “thought leadership” in the industry, to draw customers in to their website, and to exchange information with customers. Interestingly, Mentor did not hire an outside social media consultant or community manager like Cadence had. Rather, the project was homegrown. Sonia recruited various technical experts and others as bloggers. She developed “common sense” social media guidelines to make sure bloggers were informed of and played by social media rules (e.g. no sensitive or proprietary information, be polite, respect copyrights, give attribution).

According to Sonia, “one of the more difficult things was to get people to commit to blogging regularly. Writing takes time, it’s almost a full time job.” Despite this additional work burden, Mentor has no plans to bring in professional journalists as bloggers like Richard Goering at Cadence. And it doesn’t seem they need to. Simon Favre received a blog of the week award from System Level Design a few weeks ago, so they are doing quite well on their own.

Sonia does not have any specific measurable goals (page views, subscribers, etc.), which I think is a mistake, especially when her upper management comes asking for evidence that these efforts are paying off. My friend Ron likes to tell me that social media is the most measurable media ever and it’s a shame not to use the data.

I started playing with the site later in the afternoon and noticed a few things. First, when I added a comment to one of the blogs without registering, it did not show up right away, nor did I get a message that the comment was being moderated. It did show up later in the day, but it would be nice to at least be told that it was “awaiting moderation”. Still better, why moderate or require registration at all? The likelihood of getting inappropriate comments from engineering professionals is very low, and they can always be removed if need be. Moderation of comments will also kill a hot topic in its tracks. I’ve personally had the experience of publishing a new blog post late at night and waking up to several comments, some addressing other comments. Had I moderated the blog, none of those comments would have even showed up until later in the day.

Second, there was no way to enter a URL or blog address when leaving a comment. It is pretty standard practice to have this feature to allow readers to “check out” the person leaving the comment. Hopefully thay can add this.

On the positive side, the most important feature of a blog is the content and the content looks very good, especially the PCB blogs. Also, there is apparently no internal review or censorship of blog posts, so bloggers have the freedom to write whatever they want, within the social media guidelines of course.

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It’s been almost 3 years since Ron made his first pitch to his manager. Who would have thought that the Big 3 and many others would have adopted social media in such a short time. Meanwhile, my kids are still jumping on the couch.

GTG

harry the ASIC guy

Community Based Tweeting

Monday, March 9th, 2009

A few weeks ago, Seth Godin reminded us to be careful what you say online because Google never forgets.

Yesterday, Ron Ploof reminded us that we can “sift extraordinary insight out of ordinary” Twitter traffic if we know how to look.

So today, I thought I’d keep the ball rolling. I’d like to share with you an interesting Twitter thread concerning online communities for electronic design. It started last Friday and really heated up today. It’s amazing what you can find with a little effort :-)

(Note: I have reversed the usual “most-recent-first” ordering of Twitter Tweets to make this easier to read.)

JL GrayjlgrayFiddling around with the Cadence online lab on Xuropa… Still don’t get the community part of Xuropa but the VNC demo is cool.9:52 PM Mar 6th from TweetDeck

loucoveyloucovey@jlgray do you get the community part of DVCon? How about DAC? Same thing w/o hotel rooms and sore feet.10:27 PM Mar 7th from twitterrific

JL Grayjlgray@loucovey Not sure there are enough folks on Xuropa to have a robust community. Why not just use Twitter/Facebook/Verif Guild/OVM World…about 14 hours ago from TweetDeck

JL Grayjlgray@loucovey What’s on Xuropa to motivate me to build YASN (Yet Another Social Network)?about 14 hours ago from TweetDeck

Paul Marriottpmarriott@jlgray Too many communities cause fragmentation. I only have time for a few “quality” areas. I can’t be in all places at all timesabout 14 hours ago from TweetDeck

Dave_59dave_59@pmarriott @jlgray I like Plaxo and LinkedIn tie-in to social networks. I can see where people are posting from one site. Needs more tie-insabout 13 hours ago from web

david lindltweeting@jlgray @loucovey don’t know if it’s xuropa or YASN, but I for one would like to see an independent online chip-design community evolve.about 12 hours ago from TweetDeck

Paul Marriottpmarriott@dltweeting It’s hard to have any chip-design community that’s truly independent. Everyone has some kind of axe …about 11 hours ago from web

david lindltweeting@pmarriott maybe independent is too strong. how about “balanced”? something like DAC, EDAC, or GSA could potentially pull it off.about 10 hours ago from TweetDeck

Paul Marriottpmarriott@dltweeting “Balanced” like USA Today editorials? Yuck. I want opinion, not PC mediocre rubbish. At least opinion spurs debateabout 10 hours ago from TweetDeck

david lindltweeting@pmarriott haha. not interested in PC rubbish either. balanced in that we get all perspectives. don’t need one view dominating convo.about 10 hours ago from TweetDeck

Tommy Kellytommykelly@pmarriott “PC mediocre rubbish”? SO get a Mac d00d. PC. Mac. Geddit? … OK, maybe not.about 10 hours ago from TweetDeck

Paul Marriottpmarriott@tommykelly Hope Steve Jobs is paying you commission Mr Macintoshabout 10 hours ago from TweetDeck

Tommy Kellytommykelly@pmarriott The Lord Steve (May He Live Forever) doesn’t need to pay his willing minions. We work for love (and shiny objects).about 9 hours ago from TweetDeck

JL Grayjlgray@dltweeting One could say there is a chip-design community building here which is controlled by no one!about 9 hours ago from TweetDeck

JL Grayjlgray@pmarriott If past history holds, in a couple of weeks, @tommykelly will be pushing the benefits of PCs with input from Lord Gates :-).about 9 hours ago from TweetDeck

david lindltweeting@jlgray yes, but discovering voices/people -> too tedious. content disaggregated -> hard to follow convos. hashtags antiquated.about 8 hours ago from TweetDeck

Paul Marriottpmarriott@jlgray @tommykelly maybe a PC with Lord Torvalds is the best solution. No Micro$oft, no problem :) about 8 hours ago from TweetDeck

david lindltweetinganyone ever try friendfeed?about 8 hours ago from TweetDeck

Tommy Kellytommykelly@dltweeting http://friendfeed.com/tommy… . Not completely sure yet what the point is, other than an excuse for more social notworking.about 8 hours ago from TweetDeck

david lindltweeting@tommykelly me neither, but they have a friendfeed “room” … can aggregate tweets, blogs, pics, linkedin updates, etc.about 8 hours ago from TweetDeck

John Fordjohn_m_ford@tommykelly: re: “social notworking” LOL!!about 7 hours ago from BeTwittered

david lindltweeting@john_m_ford @tommykelly hah! completely missed that! not working indeed!about 7 hours ago from TweetDeck

Mentor Graphicsmentor_graphicsMentor Graphics Community FAQ http://tinyurl.com/atl8b3 #Mentorabout 4 hours ago from web

James ColgansfojamesSocial Networks Presage Professional Network Growth? http://bit.ly/8v8nVabout 3 hours ago from TweetDeck

JL Grayjlgray@dltweeting But on the bright side, you get to channel William Shatner when writing short tweets!about 3 hours ago from TweetDeck

** FREE ** Conferences

Friday, January 23rd, 2009

How much would you pay to be in the audience for some of the most thought provoking conference presentations from some of the greatest minds in the world. Here’s your ticket.

It’s FREE … completely FREE.

No registration. No airplanes. No hotels. No rental car.

While you sit at home, on a Sunday afternoon, drinking a beer.

Of course, nothing can completely replace the face to face interaction at a real conference. But in these “hard times” and with the technologies like flip cameras making video ubiquitous, it’s a damn good alternative.

It should be interesting to see what comes of DVCon, SNUG, and DAC this year in this regard. My prediction is that you will see an explosion of coverage. Videos (authorized and pirated) of presentations and floor and suite demos and interviews on flip cameras. Blog posts. Twitter feeds with customer hashtags.

What do you think?

harry the ASIC guy

SaaS EDA Roundtable at DVCON

Friday, January 16th, 2009

I’m arranging for a meeting room for an EDA SaaS roundtable discussion at DVCon in San Jose sometime between Feb 24 - Feb 26.  What I need is some volunteers to help me organize this event. For instance:

  • What will be the format and topics for discussion?
  • Who will be the key participants?
  • What do we hope to get out of this event?
  • Who is bringing the refreshments?

If you are concerned about the time commitment, I think it will be fairly minimal.  I was part of a group that helped organize the Blogger Birds of a Feather session at DAC last year and it took about an hour on 3-4 Saturday mornings.

If you would like to be part of the planning for this event, please let me know.

Also, if your company would like to be part of the roundtable, please let me know as well.

harry the ASIC guy

Squeezing the Homunculus - Try Something New

Tuesday, June 17th, 2008

Several weeks ago, Tommy Kelly published a blog post entitled DAC and the VLSI Homunculus :

“To the unwary conference goer (and the EDA companies: my addition), the most important part of the VLSI design and verification problem, is tools. Choose the right tool, and you’ll be fine. Get it wrong, and you’ll never tape out a chip again…But far, far more important are the knowledge, skills, experience, and artistry of the people who use those tools. Peopleware, not Software or Hardware, is the most important VLSI body part.”

Having spent the last decade plus of my life in some way, shape, or form in the ASIC design consulting business, I could not agree with Tommy more. Never did my clients insist on using a particular tool. But almost always they’d ask for a consultant by name, because he had the “knowledge, skills, experience, and artistry” to get the job done.

And so, when I read the EE Times Story entitled EDA Vendors Get Squeezed on Two Fronts, I had to laugh. Here were the EDA vendors once again bemoaning the fact that the EDA industry is not able to “capture the value” (i.e. charge more for its products) that it justly deserves. The article referenced strategies such as royalties that have been rejected before. (After all, if you were a general contractor, would you pay a royalty to the company that made the hammer or the saw?)

Indeed, the EDA industry is largely a Cortical Homunculus, having a distorted view of how important it is to the success of it’s customers projects. Yes, the tools are a key enabler, but more important are the designers, the people using the tools. Through my years, I have had the honor or working with designers that I would take with me wherever I go, my A-Team. And it would not matter what tools they use, they’d be successful anyway they’d need to do it!!!

I’ve spent a good portion of the last year talking to people in the EDA industry, marketing people and sales people. They tell me things like the following:

  • EDA is a dying business
  • EDA companies are just trying to take market share from competitors
  • There’s very little new in EDA
  • All the innovation comes from the small companies

They are probably not listening to me, but just in case, here is my advice to the big EDA companies.

Try Something New!!!

Instead of stealing EDA share from eachother in the analog design or verification market, solve a new problem. Make our lives easier. In basic economic terms, there is only one type of company that “captures the value” of its offering, and that is the monopoly, the one-of-a-kind product that solves a must-solve problem.

harry the ASIC guy

(Postscript: I wrote this article prior to Cadence’s offer today to buy Mentor Graphics, but it relates to the same point. Instead of doing something new, the EDA vendor strategy is to take away, or in this case BUY, market share from its competitors.

A Tale of Two Booths - Certess and Nusym

Tuesday, June 10th, 2008

I had successfully avoided the zoo that is Monday at DAC and spent Tuesday zig-zagging the exhibit halls looking for my target list of companies to visit. (And former EDA colleagues, now another year older, greyer, and heavier). Interestingly enough, the first and last booths I visited on Tuesday seemed to offer opposite approaches to address the same issue. It was the best of times, it was the worst of times.

A well polished street magician got my attention at first at the Certess booth. After a few card tricks, finding the card I had picked out in the deck, he told me that it was as easy for him to find the card as it was for Certess to find the bugs in my design. Very clever!!! Someone must have been pretty proud they came up with that one. In any case, I’d had some exposure to Certess previously and was interested enough to invest 15 minutes.

Certess’ tool does something they call functional qualification. It’s kinda like ATPG fault grading for your verification suite. Basically, it seeds your DUT with potential bugs, then considers a bug “qualified” if the verification suite would cause the bug to be controlled and observed by a checker or assertion. If you have unqualified bugs (i.e. aspects of your design that are not tested), then there are holes in your verification suite.

This is a potentially useful tool since it helps you understand where the holes are in your verification suite. What next? Write more tests and run more vectors to get to those unqualified bugs. Ugh….more tests? I was hoping this would reduce the work, not increase it!!! This might be increasing my confidence, but life was so much simpler when I could delude myself that my test suite was actually complete.

Whereas the magician caught my attention at the Certess booth, I almost missed the Nusym booth as it was tucked away in the back corner of the Exhibit Hall. Actually, they did not really have a booth, just a few demo suites with a Nusymian guarding the entrance armed with nothing more than a RFID reader and a box of Twinkies. (I did not have my camera, so you’ll have to use your imagination). After all the attention they had gotten at DVCon and from Cooley, I was surprised that “harry the ASIC guy” could just walk up and get a demo in the suite.

(Disclaimer: There was no NDA required and I asked if this was OK to blog about and was told “Yup”, so here goes…)

The cool technology behind Nusym is the ability to do on-the-fly (during simulation) coverage analysis and reactively focused vector generation. Imagine a standard System Verilog testbench with constrained random generators and checkers and coverage groups defining your functional coverage goal. Using standard constrained random testing, the generators create patterns independent of what is inside the DUT and what is happening with the coverage monitors. If you hit actual coverage monitors or not, it doesn’t matter. The generators will do what they will do, perhaps hitting the same coverage monitors over and over and missing others altogether. Result: Lots of vectors run, insufficient functional coverage, more tests needed (random or directed).

The Nusym tool (no name yet) understands the DUT and does on-the-fly coverage analysis. It builds an internal model that includes all of the branches in your DUT and all of your coverage monitors. The constraint solver then generates patterns that try to get to the coverage monitors intentionally. In this way, it can get to deeply nested and hard to reach coverage points in a few vectors whereas constrained random may take a long time or never get there. Also, when you trigger a coverage monitor, it crosses it off the list and know it does not have to hit that monitor again. So the next vectors will try to hit something new. As compared to Certess, this is actually reducing the number of tests I need to write. In fact, they recommend just having a very simple generator that defines the basic constraints and focusing most of the energy on writing the coverage monitors. Result: Much fewer vectors run, high functional coverage. No more tests needed.

It sounds too good to be true, but it was obvious that these guys really believe in this tool and that they have something special. They are taking it slow. Nusym does not have a released product yet, but they have core technology with which they are working with a few customers/partners. They are also focusing on the core of the market, Verilog DUT, System Verilog Testbench. I would not throw out my current simulator just yet, but this seems like very unique and very powerful technology that can get coverage closure orders of magnitude faster than current solutions.

If anyone else saw their demo or has any comments, please chime in.

harry the ASIC guy

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Bloggers Flock to DAC Birds-of-a-Feather Session

Friday, May 23rd, 2008


Every year on March 19th, the swallows wing their way back to San Juan Capistrano. Just up the road in Anaheim, designers from around the world will fly in for the 45th Annual Design Automation Conference, held June 8th - 13th. How appropriate will it be then, when EDA and ASIC design bloggers flock to the 1st annual DAC Birds-of-a-Feather session on blogging?

Perhaps you are a blogger or are thinking of becoming a blogger or know somebody who is a blogger. Perhaps you are a marketing director or just curious. Whatever your interest, you’ll want to come meet and engage with the bloggers who are growing in quantity, quality and industry influence:

This event will be held in Rooms 201B and 201C at the Anaheim convention center on Wednesday, June 11 at 6pm.

I am helping to coordinate this session, so if you are planning to attend, just drop a quick email to harry {at} theASICguy {dot} com so we can get an idea for how large a group we will have. If you are a blogger and would like to present or be part of a panel, please let me know as well.

I hope to see and meet many of you there.

harry the ASIC guy