Posts Tagged ‘MIPS’

Thoughts On Synopsys’ Q2 2009 Earnings Call

Thursday, May 21st, 2009

Last night you may have watched the NBA Playoff game in which the Orlando Magic came back to defeat the heavily favored Cleveland Cavaliers. Great game!!!

Or the finale of American Idol in which Kris Allen came back to defeat the heavily favored Adam Lambert. Great show!!!

What did I do last night? I listened to the Q2 2009 Synopsys earnings call. Great conference call!!!

(OK … I’ll admit it wasn’t as exciting and nail biting as either of the other viewing options. Just think of it like this: I took on the work of listening to the call and summarizing it for you, in order to free you up to watch the game or idol. You can thank me later :-) )

Here’s the summary. (You can read the full transcript here if you like).

Financials

On the up side, Synopsys had a good Q2, beating their revenue and earnings per share guidance slightly. On the down side, Synopsys lowered its revenue and cash flow guidance slightly for the rest of the year, allowing for potential customer bankruptcies, late payments, and reduced bookings. Customers are approaching Synopsys to “help them right now through this downturn”, i.e. to reduce their cost of software. It looks like the recession is finally catching up to them.

As I finish off this post on Thursday morning, it looks like the analysts agree. Synopsys shares are down 10%, so it seems they are getting punished for revising their forecast. 

Still, Synopsys is in very good financial health, with $877M in cash and short term investments. Their cash flow is going to go down the rest of the year, so they will eat into this fund, but they will still have plenty to selectively acquire strong technology that might add to their portfolio, as they did with the MIPs Analog Business Group.

Themes

There were 2 themes or phrases that kept recurring in the call that I am sure were points of emphasis for Aart.

First, the word “momentum” was used 6 times (by my count) during the call. Technology momentum. Customer momentum. Momentum in the company. Clearly, Synopsys is trying to portray an image of the company building up steam while the rest of the industry wallows in the recession.

Second, customers are “de-risking their supplier relationships”, i.e. looking to consolidate with an EDA vendor with strong financials who’ll still be there when the recession ends. Again, Synopsys is trying to portray itself as the safe choice for customers, hoping to woo customers away from less financially secure competitors like Cadence and Magma. This ties in with the flurry of “primary EDA vendor” relationships that Synopsys has announced recently.

The opportunity for Synopsys (and danger for the competition) is to pick up market share during this downturn and it looks like that may be happening as companies “de-risk” by going with the company with the “momentum” and a “extraordinarily strong position”. Or at least that’s the message that Synopsys is sending.

Technology

Aart did rattle off the usual laundry list of technology that he wanted to highlight, including some introduced last year (e.g. Z-route). Of note were the following:

  • Multi-core technology in VCS with 2x speedup (is 2x a lot?)
  • Custom Designer, which Aart called “a viable alternative to the incumbent” (ya know marketing didn’t pick the word “viable”)
  • Analog IP via the MIPS Analog Business Group acquisition, especially highlighting how that complements the Custom Designer product (do I see “design kits” in the future?)
  • The Lynx Design System (see my 5-part series)
  • IC-Validator (smells like DRC fixing in IC Compiler - Webinar today, I’ll find out more)

__________

In summary, Synopsys had a good quarter, but they have finally acknowledged that they are not immune to the downturn and they expect to get impacted the next few quarters.

harry the ASIC guy

Synopsys’ Digital to Analog Conversion

Tuesday, May 12th, 2009

Last Thursday, the same day that Synopsys announced it’s acquisition of MIPS’ Analog Business Group (ABG) for $22M in cash, I had a long overdue lunch with a former colleague of mine at Synopsys. We spent most of the time talking about family, and how each other’s jobs were going, and the economy, and the industry in general.

At some point, the discussion got around to Aart DeGeus and his leadership qualities. My friend, who plays bass guitar with Aart on occasion, shared with me his observations of Synopsys’ CEO outside of work. “He’s a born leader, even when he’s playing music,” my friend said as he related one story of how Aart lead the band in an improvisational session with the same infectious enthusiasm he brings to Synopsys. Here’s a look.

While driving back from lunch, I recalled a field conference from the mid 1990s where Aart introduced the notion of “Synopsys 2″. Synopsys 2 was to be a new company (figuratively, not literally) that would obsolete Synopsys 1 and take a new leadership role in a transforming industry. At that time, Synopsys 1 was the original “synthesis company” along with some test and simulation tools. The industry challenge driving Synopsys 2 was the need for increased designer productivity to keep up with chip sizes increasing due to the inexorable and ubiquitous Moore’s Law.

Aart’s vision for this new EDA order was twofold. First, behavioral synthesis would allow designers to design at a higher, more efficient, and more productive level of abstraction, thereby increasing their productivity. In fact, your’s truly helped develop and deliver the very first DAC floor demo of Behavioral Compiler. I also developed a very simple but elegant presentation of the power of behavioral synthesis that was used throughout Synopsys, garnered the praise of Aart himself, and sits in my desk as a memento of my time at Synopsys. Unfortunately, behavioral synthesis never really caught on at the time. Oh well. So much for that.

The second part of Aart’s productivity vision was design reuse. Needless to say, that vision has come true in spades. I don’t have reliable numbers at my finger tips, but I would guess that there is hardly a chip designed without some sort of implementation or verification IP reuse. Some chips are almost entirely reusable IP, with the only custom logic stitching it all together. I can’t imagine designing 100M gate chips without design reuse.

Design teams looking for digital IP were faced with a straightforward make vs. buy decision. On the one hand, most design teams could design the IP themselves given enough time and money. They could even prototype and verify the IP via FPGA protoytype to make sure it would work. But could they do it faster and cheaper than buying the IP and could they do it with a higher level of quality? The design team that decided they could do a better, faster, cheaper job themselves, did so. The others bought the IP.

But analog and mixed signal IP is very different. Whereas most design teams have the skills and ability to design digital IP, they usually do not have the expertise to design complex analog and mixed signal IP. Not only are analog designers more scarce, but the problem keeps getting harder at smaller geometries. Ask any analog designer you know how hard it is to design a PLL at 65 nm or 45 nm. What were 4 corner simulations at 90nm become 16 corner or even monte-carlo simulations at 45 nm and below. Not only is analog design difficult, but it often requires access to foundry specific information only available to close partners of the foundries. And even if you can get the info and design the IP, there is no quick FPGA prototype to prove it out. You need to fab a test chip (which is several months), complete with digital noise sources to stress the IP in its eventual environs. The test chip can cost several million dollars (much more than an FPGA protoype for digital IP) and you’d better count on at least one respin to get it right.

That is why Synopsys’ acquisition of the MIPS ABG IP is such a good move. The “value proposition” for analog IP is so much greater than for digital IP. It’s not a matter of whether the customer can design the IP faster, better, cheaper, it’s whether he can design it at all. By expanding its analog IP portfolio, at a bargain price, Synopsys is well positioned to provide much of the analog and mixed signal IP at 65 nm and below. In addition, this acquisition gives Synopsys a real analog design team with which they can perform design services, something they have coveted but lacked for some time.

Once again, it looks like Aart is taking the leadership role. Look for other companies to follow the leader.

harry the ASIC guy

The Week Ahead: All Eyes on SNPS & MENT

Monday, August 18th, 2008

It’s been a rocky month for EDA.

On July 23rd Cadence revised strongly downward its revenue forecast for the last 6 month of 2008. Cadence stock plummeted 30% the next day. As a direct result, Cadence scrapped its takeover bid for Mentor Graphics this past Friday.

On July 24th Rambus reported Q2 revenue down 10% from Q1 and down 25% from Q2′07. Their closing price that day of $14.70 culminated a decline of almost one-third over the previous month. As a result, Rambus has announced its cutting 20% of its workforce.

On August 7th, Magma pre-announced that its Q1 revenue would be 10% lower than expected. Result: $6.77 => $5.45 (-19%).

And just last week, MIPs announced a $100M write-down due to “the softening overall market for intellectual property and delays experienced in realizing expected synergies” (with the Chipidea acquisition). With it, a 15% layoff.

And so, all eyes will be on Synopsys and Mentor this Wednesday. First, Mentor will announce Q2 earnings at a 5:30 AM (PDT) conference call. (Show of hands, who is getting up early for that one). Then, Synopsys will announce Q3 earnings at a more reasonable time, 2:00 PM (PDT).

A few things that I’ll be watching for:

  1. During Cadence’s earnings call, Mike Fister blamed most of their predicted revenue shortfall on their customers’ decision to postpone purchases in the face of uncertainty in their own businesses. This seems to be supported by the subsequent bad news from Magma, Rambus, and MIPs. If that is the case, expect to hear similar bad news and comments from Synopsys and Mentor.  If not, then the finger will point back to Cadence.
  2. What will Mentor say about the withdrawn offer by Cadence? (Note: Mentor stock dropped 25% midday Friday after the news broke).
  3. Several analysts and observers (including myself) felt that Synopsys would benefit from the uncertainty caused by the Cadence - Mentor acquisition battle. I’ll be interested to see if Synopsys’ numbers show that or if there is any anecdotal information of a big customer switching to Synopsys as a result.
  4. This will be the 1st quarter since Synopsys acquired Synplicity, so look to see how that is going.  From what I hear, Synopsys plans to keep the businesses mostly separate through the end of FY08 (October).

It should be an interesting week…

harry the ASIC guy